NEC V850E/MA1, User Manual, Page: 488 / 567

CHAPTER 14 PORT FUNCTIONS
User’s Manual U14359EJ4V0UM
488
14.3.10 Port DL
Port DL (PDL) is a 16-bit I/O port that can be set in the input or output mode in 1-bit units.
When the higher 8 bits of port DL are used as port DLH (PDLH), and the lower 8 bits as port DLL (PDLL), port DL
becomes two 8-bit ports that can be set in the input or output mode in 1-bit units.
15 14 13 12 11 10 9 8 Address After reset
PDL PDL15 PDL14 PDL13 PDL12 PDL11 PDL10 PDL9 PDL8 FFFFF005H Undefined
7 6 5 4 3 2 1 0 Address
PDL7 PDL6 PDL5 PDL4 PDL3 PDL2 PDL1 PDL0 FFFFF004H
Bit position Bit name Function
15 to 0
PDLn
(n = 15 to 0)
Port DL
I/O port
In addition to their functions as port pins, in the control mode, the port DL pins operate as a data bus for when the
memory is externally expanded.
(1) Operation in control mode
Port Alternate Function Pin Name Remark Block Type
Port DL PDL15 to
PDL0
D15 to D0 Data bus when memory expanded O
(2) I/O mode/control mode setting
The port DL I/O mode setting is performed by the port DL mode register (PMDL), and the control mode
setting is performed by the port DL mode control register (PMCDL).
(a) Port DL mode register (PMDL)
The port DL mode register (PMDL) can be read/written in 16-bit units.
If the higher 8 bits of PMDL are used as port DL mode register H (PMDLH), and the lower 8 bits as port
DL mode register L (PMDLL), these two 8-bit port mode registers can be read/written in 8-bit or 1-bit
units.
15 14 13 12 11 10 9 8 Address After reset
PMDL PMDL15 PMDL14 PMDL13 PMDL12 PMDL11 PMDL10 PMDL9 PMDL8 FFFFF025H FFFFH
7 6 5 4 3 2 1 0 Address
PMDL7 PMDL6 PMDL5 PMDL4 PMDL3 PMDL2 PMDL1 PMDL0 FFFFF024H
Bit position Bit name Function
15 to 0
PMDLn
(n = 15 to 0)
Port Mode
Specifies input/output mode for PDLn pin.
0: Output mode (output buffer on)
1: Input mode (output buffer off)