CHAPTER 4 BUS CONTROL FUNCTION
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User’s Manual U14359EJ4V0UM
4.5.5 Bus width
The V850E/MA1 accesses peripheral I/O and external memory in 8-bit, 16-bit, or 32-bit units. The following shows
the operation for each type of access. All data is accessed in order starting from the lower order side.
(1) Byte access (8 bits)
(a) When the data bus width is 16 bits (little endian)
<1> Access to even address (2n)
<2> Access to odd address (2n + 1)
7
0
7
0
Byte data
15
8
External
data bus
2n
Address
7
0
7
0
Byte data
15
8
External
data bus
2n + 1
Address
(b) When the data bus width is 8 bits (little endian)
<1> Access to even address (2n)
<2> Access to odd address (2n + 1)
7
0
7
0
Byte data
External
data bus
2n
Address
7
0
7
0
Byte data
External
data bus
2n + 1
Address
(c) When the data bus width is 16 bits (big endian)
<1> Access to even address (2n)
<2> Access to odd address (2n + 1)
7
0
7
0
Byte data
15
8
External
data bus
2n
Address
7
0
7
0
Byte data
15
8
External
data bus
2n + 1
Address
