CHAPTER 16 FLASH MEMORY (
µµµµ
PD70F3107A)
528
User’s Manual U14359EJ4V0UM
16.7.8 Contents of RAM parameters
Reserve the following 48-byte area in the internal RAM or external RAM for the RAM parameters, and set the
parameters to be input. Set the base addresses of these parameters to ep (r30).
Table 16-8. Description of RAM Parameter
Address
Size
I/O
Description
ep+0
4 bytes
−
For internal operations
ep+4:Bit 5
Note 1
1 bit
Input
Operation flag (Be sure to set this flag to 1 before calling the device internal processing.)
0: Normal operation in progress
1: Self-programming in progress
ep+4:Bit 7
Notes 2, 3
1 bit
Output
NMI flag
0: NMI not detected
1: NMI detected
ep+8
4 bytes
Input
Erase time (unsigned 4 bytes)
Expressed as 1 count value in units of the internal operation unit time (100
µ
s).
Set value = Erase time (
µ
s)/internal operation unit time (
µ
s)
Example: If erase time is 0.4 s
→
0.4
×
1,000,000/100 = 4,000 (integer operation)
ep+0xc
4 bytes
Input
Write back time (unsigned 4 bytes)
Expressed as 1 count value in units of the internal operation unit time (100
µ
s).
Set value = Write back time (
µ
s)/internal operation unit time (
µ
s)
Example: If write back time is 1 ms
→
1
×
1,000/100 = 10 (integer operation)
ep+0x10
2 bytes
Input
Timer set value for creating internal operation unit time (unsigned 2 bytes)
Write a set value that makes the value of timer D the internal operation unit time (100
µ
s).
Set value = Operating frequency (Hz)/1,000,000
×
Internal operation unit time (
µ
s)/
Timer division ratio (4) + 1
Note 4
Example: If the operating frequency is 50 MHz
→
50,000,000/1,000,000
×
100/4 + 1 = 1,251 (integer operation)
ep+0x12
2 bytes
Input
Timer set value for creating write time (unsigned 2 bytes)
Write a set value that makes the value of timer D the write time.
Set value = Operating frequency (Hz)/Write time (
µ
s)/Timer division ratio (4) + 1
Note 4
Example: If the operating frequency is 50 MHz and the write time is 20
µ
s
→
50,000,000/1,000,000
×
20/4 + 1 = 251 (integer operation)
ep+0x14
28 bytes
−
For internal operations
Notes 1.
Fifth bit of address of ep+4 (least significant bit is bit 0.)
2.
Seventh bit of address of ep+4 (least significant bit is bit 0.)
3.
Clear the NMI flag by the user program because it is not cleared by the device internal processing.
4.
The device internal processing sets this value minus 1 to the timer. Because the fraction is rounded up,
add 1 as indicated by the expression of the set value.
Caution
Be sure to reserve the RAM parameter area at a 4-byte boundary.
