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User’s Manual U14359EJ4V0UM
CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)
The V850E/MA1 includes a direct memory access (DMA) controller (DMAC) that executes and controls DMA
transfer.
The DMAC controls data transfer between memory and I/O, or among memories, based on DMA requests issued
by the on-chip peripheral I/O (serial interface, real-time pulse unit, and A/D converter), DMARQ0 to DMARQ3 pins, or
software triggers (memory refers to internal RAM or external memory).
6.1
Features
• 4 independent DMA channels
• Transfer unit: 8/16 bits
• Maximum transfer count: 65,536 (2
16
)
• Two types of transfer
• Flyby (1-cycle) transfer
• 2-cycle transfer
• Three transfer modes
• Single transfer mode
• Single-step transfer mode
• Block transfer mode
• Transfer requests
• Request by interrupts from on-chip peripheral I/O (serial interface, real-time pulse unit, A/D converter)
• Requests via DMARQ0 to DMARQ3 pin input
• Requests by software trigger
• Transfer objects
• Memory
↔
I/O
• Memory
↔
memory
• DMA transfer end output signals (TC0 to TC3)
• Next address setting function
