FlexRay Module Registers
1337
SPNU563A – March 2018
Copyright © 2018, Texas Instruments Incorporated
FlexRay Module
The loop back mode is intended to check the modules internal data paths. Normal, time triggered
operation is not possible in loop back mode.
There are two possibilities to perform a loop back test. External loop back through the physical layer
(TEST1.ELBE = 1) or internal loop back for in-system self-test (TEST1.ELBE = 0). In case of an internal
loop back pins txen1,2_n are in their inactive state, pins txd1,2 are set, pins rxd1,2 are not evaluated.
When the communication controller is in loop back mode, a loop back test is started by the host writing a
message to the input buffer and requesting the transmission by writing to the input buffer command
request register. The message handler will transfer the message into the message RAM and then into the
transient buffer of the selected channel. The channel protocol controller (PRT) will read (in 32-bit words)
the message from the transmit part of the transient buffer and load it into its Rx / Tx shift register. The
serial transmission is looped back into the shift register; its content is written into the receive part of the
channels transient buffer before the next word is loaded.
The PRT and the message handler will then treat this transmitted message like a received message,
perform an acceptance filtering on frame ID and receive channel, and store the message into the
message RAM (assuming the message passed the acceptance filter, thus testing the acceptance filter
logic). The loop back test ends with the host requesting this received message from the message RAM
and then checking the contents of the output buffer.
Each FlexRay channel is tested separately. The FlexRay module cannot receive messages from the
FlexRay bus while it is in the loop back mode.
The cycle counter value of frames used in loop back mode can be programmed by writing to the CCV bits
of the MTCCV register (writable in ATM and loop back mode only).
NOTE:
In case of an odd payload the last two bytes of the looped-back payload will be right aligned
(shifted by 16 bits to the right) inside the last 32-bit data word.
The controller host interface command SEND_MTS results in the immediate transmission of an MTS
symbol. Transmitted MTS symbols will not cause status interrupt flags MTSA,B to be set in the Status
Interrupt Register. MTS symbols received while operating in loop back mode will set status interrupt flags
MTSA,B in System Interrupt Register like in monitor mode. The reception of an MTS symbol can be
emulated by driving the FlexRay receive pins RxD1,2 to low for the duration of the symbol in external loop
back mode, or by driving the FlexRay pins TxD1,2 and TxEN1,2 to low using the TXA,B and TXENA,B of
Test Register1 in internal or external loop back mode.
