ADC Registers
928
SPNU563A – March 2018
Copyright © 2018, Texas Instruments Incorporated
Analog To Digital Converter (ADC) Module
22.3.40 ADC Event Group Results Emulation FIFO Register (ADEVEMUBUFFER)
ADC Event Group Results Emulation FIFO Register (ADEVEMUBUFFER) is shown in
and
, and described in
. As shown, the format of the data read from the
ADEVEMUBUFFER locations is different based on whether the ADC module is configured to be a 12-bit
or a 10-bit ADC module.
A read from this location also gives out one conversion result from the Event Group results’ memory along
with the EV_EMPTY status bit and the optional channel id. However, this read will not affect any of the
status flags in the Event Group interrupt flag register or the Event Group status register. This register is
useful for debuggers.
Figure 22-66. 12-bit ADC Event Group Results Emulation FIFO Register (ADEVEMUBUFFER)
[offset = F0h]
31
30
21
20
16
EV_EMPTY
Reserved
EV_CHID
R-1
R-0
R-0
15
12
11
0
Reserved
EV_DR
R-0
R-U
LEGEND: R = Read only; -
n
= value after reset; U = value after reset is unknown
Figure 22-67. 10-bit ADC Event Group Results Emulation FIFO Register (ADEVEMUBUFFER)
[offset = F0h]
31
16
Reserved
R-0
15
14
10
9
0
EV_EMPTY
EV_CHID
EV_DR
R-1
R-0
R-U
LEGEND: R = Read only; -
n
= value after reset; U = value after reset is unknown
Table 22-46. ADC Event Group Results Emulation FIFO Register (ADEVEMUBUFFER)
Field Descriptions
Field
Value
Description
Reserved
0
Reads return 0. Writes have no effect.
EV_EMPTY
Event Group FIFO Empty. This bit is applicable only when the "read from FIFO" mode is used for reading
the Event Group conversion results.
Any operation mode read:
0
The data in the EV_DR field of this buffer is valid.
1
The data in the EV_DR field of this buffer is not valid and there are no valid data in the Event Group results
memory.
EV_CHID
Event Group Channel Id. These bits are also applicable only when the "read from FIFO" mode is used for
reading the Event Group conversion results.
Any operation mode read:
0
The conversion result in the EV_DR field of this buffer is from the ADC input channel 0, or the channel id
mode is disabled in the Event Group operating mode control register (ADEVMODECR).
1h-1Fh
The conversion result in the EV_DR field of this buffer is from the ADC input channel number denoted by
the EV_CHID field.
EV_DR
Event Group Digital Conversion Result.
These bits contain the digital result output from the Event Group FIFO buffer. The result can be presented
in an 8-bit, 10-bit, or 12-bit format for a 12-bit ADC module, or in an 8-bit or 10-bit format for a 10-bit ADC
module. The conversion result data is automatically shifted right by the appropriate number of bits when
using a reduced-size data format with the upper bits reading as zeros.
