Module Operation
1229
SPNU563A – March 2018
Copyright © 2018, Texas Instruments Incorporated
FlexRay Module
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Correction done in odd numbered cycles, distributed over the macroticks beginning at offset correction
start up to cycle end (end of NIT) to shift nodes next start of cycle (MTs lengthened / shortened)
26.2.4.3.2 Rate (Frequency) Correction
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Pairs of deviation values measured and stored in even / odd cycle pair used
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For a two channel node the average of the differences from the two channels is used
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Calculated during NIT of odd numbered cycles
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Cluster drift damping is performed using global damping value
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Checked against limit values
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Correction value is a signed integer number of
μ
Ts
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Distributed over macroticks comprising the next even/odd cycle pair (MTs lengthened / shortened)
26.2.4.4 Sync Frame Transmission
Sync frame transmission is only possible from buffer 0 and 1. Message buffer 1 may be used for sync
frame transmission in case that sync frames should have different payloads on the two channels. In this
case bit MRC.SPLM has to be programmed to 1.
Message buffers used for sync frame transmission have to be configured with the key slot ID and can be
(re)configured in DEFAULT_CONFIG or CONFIG state only. For nodes transmitting sync frames
SUCC1.TXSY must be set to 1.
26.2.4.5 External Clock Synchronization
During normal operation, independent clusters can drift significantly. If synchronous operation across
independent clusters is desired, external synchronization is necessary; even though the nodes within each
cluster are synchronized. This can be accomplished with synchronous application of host-deduced rate
and offset correction terms to the clusters.
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External offset / rate correction value is a signed integer
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External offset / rate correction value is added to calculated offset / rate correction value
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Aggregated offset / rate correction term (ex internal) is not checked against configured limits
26.2.5 Error Handling
The implemented error handling concept of the FlexRay protocol is intended to ensure that in the
presence of a lower layer protocol error in a single node, communication between non-affected nodes can
be maintained. In some cases, higher layer program command activity is required for the communication
controller to resume normal operation. A change of the error handling state will set bit EIR.PEMC and can
trigger an interrupt to the host if enabled. The current error mode is signaled by CCEV.ERRM(1-0).
Table 26-5. Error Modes of the POC (Degradation Model)
Error Mode
Activity
ACTIVE
Full operation
, State: NORMAL_ACTIVE
The communication controller is fully synchronized and supports the cluster wide clock synchronization. The
host is informed of any error condition(s) or status change by interrupt (if enabled) or by reading the error
and status flags from registers EIR and SIR.
PASSIVE
Reduced operation
, State: NORMAL_PASSIVE, communication controller self rescue allowed
The communication controller stops transmitting frames and symbols, but received frames are still
processed. Clock synchronization mechanisms are continued based on received frames. No active
contribution to the cluster wide clock synchronization. The host is informed of any error condition(s) or status
change by interrupt (if enabled) or by reading the error and status flags from registers EIR and SIR.
COMM_HALT
Operation halted
, State: HALT, communication controller self rescue not allowed
The communication controller stops frame and symbol processing, clock synchronization processing, and
the macrotick generation. The host has still access to error and status information by reading the error and
status flags from registers EIR and SIR. The bus drivers are disabled.