LIN
1661
SPNU563A – March 2018
Copyright © 2018, Texas Instruments Incorporated
Serial Communication Interface (SCI)/ Local Interconnect Network (LIN)
Module
29.3.4.1.2 Receiving Data in Multi-Buffer Mode
Multi-buffer mode is selected when the MBUF MODE bit is set to 1. In this mode, LIN sets the RXRDY bit
after receiving the programmed number of data in the receive buffer and the checksum field, the complete
frame. The error condition detection logic is similar to the single-buffer mode, except that it monitors for
the complete frame. Like single-buffer mode, you can use the polling, interrupt, or DMA method to read
the data. The received data has to be read from the LINRD0 and LINRD1 registers, based on the number
of bytes. For a LENGTH less than or equal to 4, a read from the LINRD0 register clears the RXRDY flag.
For a LENGTH greater than 4, a read from the LINRD1 register clears the RXRDY flag. If the checksum
scheme is enabled by setting the Compare Checksum (CC) bit to 1 during the reception of the data, then
the byte that is received after the reception of the programmed number of data bytes indicated by the
LENGTH field is treated as a checksum byte. The CC bit will be cleared once the checksum is received
and compared.
29.3.4.2 Transmitting Data
The LIN transmitter is enabled if both the TX FUNC bit and the TXENA bit are set to 1. If the TX FUNC bit
is not set, the LINTX pin functions as a general-purpose I/O pin rather than as a LIN function pin. Any
value written to the TD0 before the TXENA bit is set to 1 is not transmitted. Both of these control bits allow
for the LIN transmitter to be held inactive independently of the receiver.
The ID TX flag is set after a valid LIN ID is received with TX Match. An ID interrupt is generated, if
enabled.
29.3.4.2.1 Transmitting Data in Single-Buffer Mode
Single-buffer mode is selected when the MBUF MODE bit is cleared to 0. In this mode, LIN waits for data
to be written to TD0, transfers it to SCITXSHF, and transmits the data. The TXRDY and TX EMPTY bits
indicate the status of the transmit buffers. That is, when the transmitter is ready for data to be written to
TD0, the TXRDY bit is set. Additionally, if both TD0 and SCITXSHF are empty, then the TX EMPTY bit is
also set.
You can transmit data by:
1. Polling Transmit Ready Flag
2. Transmit Interrupt
3. DMA
In polling method, software can poll for the TXRDY bit to go high before writing the data to the TD0. The
CPU is unnecessarily overloaded by selecting the polling method. To avoid this, you can use either the
interrupt or DMA method. To use the interrupt method, the SET TX INT bit is set. To use the DMA
method, the SET TX DMA bit is set. Either an interrupt or a DMA request is generated the moment the
TXRDY bit is set. When the LIN has completed transmission of all pending frames, the SCITXSHF register
and the TD0 are empty, the TXRDY bit is set, and an interrupt/DMA request is generated, if enabled.
Because all data has been transmitted, the interrupt/DMA request should be halted. This can either be
done by disabling the transmit interrupt (CLR TX INT) / DMA request (CLR TX DMA bit) or by disabling
the transmitter (clear TXENA bit). If the checksum scheme is enabled by setting the Send Checksum (SC)
bit to 1, the checksum byte will be sent after the current byte transmission. The SC bit will be cleared after
the checksum byte has been transmitted.
NOTE:
The TXRDY flag cannot be cleared by reading the corresponding interrupt offset in the
SCIINTVECT0 or SCIINTVECT1 register.
