Status Reporting
37
Keysight InfiniiVision M9241/42/43A PXIe Oscilloscopes SCPI Programmer's Guide
1317
Status Reporting Data Structures
The following figure shows how the status register bits are masked and logically
OR'ed to generate service requests (SRQ) on particular events.
:OVLR?
Overload Event Register
:OVL
:OVL?
Overload Event Enable (Mask) Register
:HWERegister:CONDition?
Hardware Event Condition Register
:HWEenable
:HWEenable?
Hardware Event Enable (MASK) Register
:HWERegister[:EVENt]?
Hardware Event Event Register
:MTEenable
:MTEenable?
Mask Test Event Enable (MASK) Register
:MTERegister[:EVENt]?
Mask Test Event Event Register
9
8
10
11
12
13
14
15
OR
1
0
2
3
4
5
6
7
Chan2
OVL
Chan1
OVL
Chan3
OVL
Chan4
OVL
Ext Trig
OVL
Chan2
Fault
Chan1
Fault
Chan3
Fault
Chan4
Fault
Ext Trig
Fault
1
0
2
3
4
5
6
7
9
8
10
11
12
13
14
15
PLL
Locked
0
OR
OR
1
0
2
3
4
5
6
7
9
8
10
11
12
13
14
15
Com-
plete
MTE
To bits in Operation Status Condition Register:
OVLR
HWE
Auto
Mask
Started
Pass
Fail