Remote Control - Commands
NRP2
304
User Manual 1173.9140.02 ─ 07
6.13.5 Status Byte (STB) and Service Request Enable Register (SRE)
The STB is already defined in IEEE 488.2. It gives a rough overview of the device sta-
tus, collecting information from the lower-level registers. It is comparable with the
CONDition register of a SCPI defined register and is at the highest level of the SCPI
hierarchy. Its special feature is that bit 6 acts as the summary bit of all other bits of the
Status Byte Register.
The status byte is read by the query *STB? or a serial poll. The SRE is associated with
the STB. The function of the SRE corresponds to that of the ENABle register of the
SCPI registers. Each bit of the STB is assigned a bit in the SRE. Bit 6 of the SRE is
ignored. If a bit is set in the SRE and the associated bit in the STB changes from 0 to
1, a service request (SRQ) will be generated on the IEC/IEEE bus, which triggers an
interrupt in the controller configured for this purpose, and can be further processed by
the controller.
The SRE can be set by the command
*SRE
and read by the query
*SRE?
.
Table 6-18: Meaning of bits used in the status byte
Bit No.
Meaning
0
Not used
1
Device Status Register summary bit
Depending on the configuration of the device status register, this bit is set when a sensor is
connected or disconnected, when an error has occurred in a sensor or when a key has
been pressed.
2
Error Queue not empty
The bit is set if the error queue has an entry. If this bit is enabled by the SRE, each entry of
the error queue will generate a service request. An error can thus be recognized and speci-
fied in detail by querying the error queue. The query yields a conclusive error message.
This procedure is recommended since it considerably reduces the problems of IEC/IEEE-
bus control.
3
Questionable Status Register summary bit
This bit is set if an EVENt bit is set in the QUEStionable Status Register and the associated
ENABLe bit is set to 1. A set bit denotes a questionable device status which can be speci-
fied in greater detail by querying the QUEStionable Status Register.
4
MAV-Bit
(Message available)
This bit is set if a readable message is in the output queue. This bit may be used to auto-
mate reading of data from the device into the controller.
5
ESB: Standard Event Status Register summary bit
This bit is set if one of the bits in the Standard Event Status Register is set and enabled in
the Event Status Enable Register. Setting this bit denotes a serious error which can be
specified in greater detail by querying the Standard Event Status Register.
STATus
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