Hitachi H8S/2670, Reference Manual

Page: 597 / 647

580
SMR1—Serial Mode Register 1 H'FF80 SCI1
Bit
Initial value
Read/Write
7
C/
A
0
R/W
6
CHR
0
R/W
5
PE
0
R/W
4
O/
E
0
R/W
3
STOP
0
R/W
2
MP
0
R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
0 0 ø clock
ø/4 clock
ø/16 clock
ø/64 clock
Clock Select
1
1 0
1
0 Multiprocessor function disabled
Multiprocessor format selected
Multiprocessor Mode
1
0 1 stop bit
2 stop bits
Stop Bit Length
1
0 Even parity
Odd parity
Parity Mode
1
0 Parity bit addition and checking disabled
Parity bit addition and checking enabled
Parity Enable
1
0 8-bit data
7-bit data
*
Character Length
1
0 Asynchronous mode
Synchronous mode
Asynchronous Mode/Synchronous Mode Select
1
Note:
*
When 7-bit data is selected, the MSB (bit 7)
of TDR is not transmitted, and LSB-first/
MSB-first selection is not available.