Hitachi H8S/2670, Reference Manual

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382
Clock Timing
Table 7.4 Clock Timing
Condition A*: V
CC
= 2.7 V to 3.6 V, AV
CC
= 2.7 V to 3.6 V, V
ref
= 2.7 V to AV
CC
,
V
SS
= AV
SS
= 0 V, ø = 2 MHz to 20 MHz, T
a
= –20°C to +75°C (regular
specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition B: V
CC
= 3.0 V to 3.6 V, AV
CC
= 3.0 V to 3.6 V, V
ref
= 3.0 V to AV
CC
,
V
SS
= AV
SS
= 0 V, ø = 2 MHz to 33 MHz, T
a
= –20°C to +75°C (regular
specifications), T
a
= –40°C to +85°C (wide-range specifications)
* In planning stage
Condition A Condition B
Test
Item Symbol Min Max Min Max Unit Conditions
Clock cycle time t
cyc
50 500 30.3 500 ns Figure 7.2
Clock pulse high width t
CH
20 — 10 — ns Figure 7.2
Clock pulse low width t
CL
20 — 10 — ns
Clock rise time t
Cr
— 5 — 5 ns
Clock fall time t
Cf
— 5 — 5 ns
Reset oscillation stabilization
time (crystal) t
OSC1
10 — 10 — ms Figure 7.3(1)
Software standby oscillation
stabilization time (crystal) t
OSC2
10 — 10 — ms Figure 7.3(2)
External clock output delay
stabilization time t
DEXT
500 — 500 —
µ
s Figure 7.3(1)