Hitachi H8S/2670, Reference Manual

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Bits 7 and 6 are reserved; if read they will return an undefined value.
If a port 6 read is performed while P6DDR bits are set to 1, the P6DR values are read. If a port 6
read is performed while P6DDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORT6 contents are determined by the pin states, as
P6DDR and P6DR are initialized. PORT6 retains its prior state in software standby mode.
Port Function Control Register 2 (PFCR2)
Bit 7 6 5 4 3 2 1 0
— — — — ASOE LWROE OES DMACS
Initial value 0 0 0 0 1 1 1 0
Read/Write — — — — R/W R/W R/W R/W
PFCR2 is an 8-bit readable/writable register that performs I/O port control. PFCR2 is initialized to
H'0E by a reset and in hardware standby mode. It retains its prior state in software standby mode.
Bits 7 to 4—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 0—DMAC Control Pin Select (DMACS): Selects the DMAC control port.
Bit 0
DMACS
Description
0 P65 to P60 are designated as DMAC control pins (Initial value)
1 P75 to P70 are designated as DMAC control pins
5.7.3 Pin Functions
Port 6 pins also function as 8-bit timer input/output pins (TMRI0, TMCI0, TMO0, TMRI1,
TMCI1, and TMO1), interrupt input pins (
IRQ13
to
IRQ8
), and DMAC input/output pins
(
DREQ0
,
TEND0
,
DACK0
,
DREQ1
,
TEND1
, and
DACK1
). Port 6 pin functions are shown in
table 5.12.