Hitachi H8S/2670, Reference Manual

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5.9.2 Register Configuration
Table 5.15 shows the port 8 register configuration.
Table 5.15 Port 8 Registers
Name Abbreviation R/W Initial Value Address *
1
Port 8 data direction register P8DDR W H'00 *
2
H'FE27
Port 8 data register P8DR R/W H'00 *
2
H'FF67
Port 8 register PORT8 R Undefined H'FF57
Notes: 1. Lower 16 bits of the address.
2. Value of bits 5 to 0.
Port 8 Data Direction Register (P8DDR)
Bit 7 6 5 4 3 2 1 0
— — P85DDR P84DDR P83DDR P82DDR P81DDR P80DDR
Initial value 0 0 0 0 0 0 0 0
Read/Write — — W W W W W W
P8DDR is a 6-bit write-only register, the individual bits of which specify input or output for the
pins of port 8. P8DDR cannot be read; if it is, an undefined value will be read. Bits 7 and 6 are
reserved.
Setting a P8DDR bit to 1 makes the corresponding port 8 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P8DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port 8 Data Register (P8DR)
Bit 7 6 5 4 3 2 1 0
— — P85DR P84DR P83DR P82DR P81DR P80DR
Initial value 0 0 0 0 0 0 0 0
Read/Write — — R/W R/W R/W R/W R/W R/W
P8DR is a 6-bit readable/writable register that stores output data for the port 8 pins (P85 to P80).
Bits 7 and 6 are reserved; they are always read as 0 and cannot be modified.