Hitachi H8S/2670, Reference Manual

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5.12.2 Register Configuration
Table 5.23 shows the port C register configuration.
Table 5.23 Port C Registers
Name Abbreviation R/W Initial Value Address *
Port C data direction register PCDDR W H'00 H'FE2B
Port C data register PCDR R/W H'00 H'FF6B
Port C register PORTC R Undefined H'FF5B
Port C MOS pull-up control register PCPCR R/W H'00 H'FE38
Note:
*
Lower 16 bits of the address.
Port C Data Direction Register (PCDDR)
Bit 7 6 5 4 3 2 1 0
PC7DDR PC6DDR PC5DDR PC4DDR PC3DDR PC2DDR PC1DDR PC0DDR
Initial value 0 0 0 0 0 0 0 0
Read/Write W W W W W W W W
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port C. PCDDR cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode. The OPE bit in SBYCR is used to select whether the address output pins
retain their output state or become high-impedance when a transition is made to software standby
mode.
•
Modes 1, 2, 5, and 6
Port C pins are address outputs regardless of the PCDDR settings.
•
Mode 4
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while clearing
the bit to 0 makes the pin an input port.
•
Mode 7 (when bit EXPE is set to 1 in SYSCR)
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while clearing
the bit to 0 makes the pin an input port.
•
Mode 7 (when bit EXPE is cleared to 0 in SYSCR)
Port C is an I/O port, and its pin functions can be switched with PCDDR.