Registers
899
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Table 1-486. VIP_PARSER_fiq_mask Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
5
Reserved
R
0h
4
OUTPUT_FIFO_PRTA_Y
UV_OF
R/W
0h
Output FIFO Port A Luma Overflow Mask
3
ASYNC_FIFO_PRTB_OF
R/W
0h
Port B Async FIFO Overflow FIQ Mask
2
ASYNC_FIFO_PRTA_OF
R/W
0h
Port A Async FIFO Overflow FIQ Mask
1
PRTB_VDET_MASK
R/W
0h
Port B Video Detect FIQ Mask
0
PRTA_VDET_MASK
R/W
0h
Port A Video Detect FIQ Mask