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Registers
787
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.3.10.5 nf_reg4 Register (offset = 10h) [reset = 0000060Dh]
nf_reg4 is shown in
and described in
.
Figure 1-468. nf_reg4 Register
31
30
29
28
27
26
25
24
Reserved
R-0h
23
22
21
20
19
18
17
16
Reserved
R-0h
15
14
13
12
11
10
9
8
Reserved
TEMPORAL_FILTER_TRIGGER_NOISE
R-0h
R/W-6h
7
6
5
4
3
2
1
0
Reserved
TEMPORAL_STRENGTH
R-0h
R/W-Dh
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit;
-n
= value after reset
Table 1-382. nf_reg4 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-12
Reserved
R
0h
11-8
TEMPORAL_FILTER_TRI
GGER_NOISE
R/W
6h
The smallest noise level to fully trigger temporal filter.
7-6
Reserved
R
0h
5-0
TEMPORAL_STRENGTH
R/W
Dh
Temporal filter strength. 0 means disabled.