![background image](http://html1.mh-extra.com/html/texas-instruments/dm38x-davinci/dm38x-davinci_user-manual_1097067621.webp)
Registers
621
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Table 1-274. VPDMA_int2_channel4_int_mask Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
2
INT_MASK_VIP2_MULT_
PORTB_SRC6
R/W
0h
The interrupt for Video Input 2 Port B Channel 6 should generate an
interrupt on interrupt vpdma_int2. Write a 1 for the interrupt event to
trigger the interrupt signal.
1
INT_MASK_VIP2_MULT_
PORTB_SRC5
R/W
0h
The interrupt for Video Input 2 Port B Channel 5 should generate an
interrupt on interrupt vpdma_int2. Write a 1 for the interrupt event to
trigger the interrupt signal.
0
INT_MASK_VIP2_MULT_
PORTB_SRC4
R/W
0h
The interrupt for Video Input 2 Port B Channel 4 should generate an
interrupt on interrupt vpdma_int2. Write a 1 for the interrupt event to
trigger the interrupt signal.