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VPDMA
CHR_US
DEI
SC_M
420 Current
SC out
422
YUV
MV N-1
To
YUV422
Compositor
8
8x4
4
4
16
20
[9
:2]
{[8],
2
’d0
}
VC1
20
[9
:2]
{[8], 2’d0}
16
10x4
10
8
8
8x4
CHR_US
U
V
in
_
f1
Y
in
_
f1
8
8x4
{[
8
],
2
’d
0
}
VC1
[9
:2
]
10x4
10
8
8
8x4
CHR_US
UV
Y
8
8x4
{[
8
],
2
’d
0
}
VC1
[9
:2
]
10x4
10
8
8
8x4
420 N-1
420 N-2
U
V
in
_
f2
Y
in
_
f2
M
V
o
u
t_
f0
M
V
in
_
f1
Internal Modules
182
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Figure 1-131. VPDMA Transfer Ports
The following are the VPDMA ports (from DEI to memory) available:
•
Inputs
–
Current (N)
•
Y (current Luma)
•
UV (current Chroma
–
One field delay (N-1)
•
Yin_f1 (1-field delayed Luma)
•
UVin_f1 (1-field delayed Chroma)
•
MVin_f1 (1-field delayed Motion Vectors)
–
Two field delay (N-2)
•
Yin_f2 (2-field delayed Luma)
•
UVin_f2 (2-field delayed Chroma)