Internal Modules
262
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Table 1-106. VPDMA Client Buffering (continued)
Client
Channel(s)
Buffering
Shared Buffer
vip2_lo_y
vip2_mult_porta_src0
vip2_mult_porta_src1
vip2_mult_porta_src2
vip2_mult_porta_src3
vip2_mult_porta_src4
vip2_mult_porta_src5
vip2_mult_porta_src6
vip2_mult_porta_src7
vip2_mult_porta_src8
vip2_mult_porta_src9
vip2_mult_porta_src10
vip2_mult_porta_src11
vip2_mult_porta_src12
vip2_mult_porta_src13
vip2_mult_porta_src14
vip2_mult_porta_src15
vip2_portb_luma
vip2_portb_rgb
11520
VP_WR2
vip2_lo_uv
vip2_mult_portb_src0
vip2_mult_portb_src1
vip2_mult_portb_src2
vip2_mult_portb_src3
vip2_mult_portb_src4
vip2_mult_portb_src5
vip2_mult_portb_src6
vip2_mult_portb_src7
vip2_mult_portb_src8
vip2_mult_portb_src9
vip2_mult_portb_src10
vip2_mult_portb_src11
vip2_mult_portb_src12
vip2_mult_portb_src13
vip2_mult_portb_src14
vip2_mult_portb_src15
vip2_portb_chroma
11520
VP_WR2
vip2_up_y
vip2_porta_luma
vip2_porta_rgb
11520
VP_WR2
vip2_up_uv
vip2_porta_chroma
11520
VP_WR2
grpx1_st
grpx1_stencil
1024
GRPX_BUF
grpx2_st
grpx2_stencil
1024
GRPX_BUF1
grpx3_st
grpx3_stencil
1024
MV
nf_422_in
nf_read
4096
NF_BUF
nf_420_y_in
nf_last_luma
4096
NF_BUF1
nf_420_uv_in
nf_last_chroma
4096
NF_BUF
nf_420_y_out
nf_write_luma
4096
NF_BUF1
nf_420_uv_out
nf_write_chroma
4096
NF_BUF
vbi_sdvenc
vbi_sd_venc
256
MEM_TO_MEM
vpi_ctl
1024
MEM_TO_MEM1
hdmi_wrbk_out
post_comp_wr
4096
MEM_TO_MEM
trans1_chroma
transcode1_chroma
11520
TRANS_VID0
trans1_luma
transcode1_luma
7680
TRANS_VID1
trans2_chroma
transcode2_chroma
11520
TRANS_VID2
trans2_luma
transcode2_luma
7680
TRANS_VID3