Texas Instruments DM38x DaVinci, User Manual

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Registers
517 SPRUHI7A – December 2012 – Revised June 2016
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Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Table 1-241. VPDMA_int0_client1_int_stat Register Field Descriptions (continued)
Bit Field Type Reset Description
24 INT_STAT_TRANS2_CH
ROMA W 0h
The client interface trans2_chroma has reached its current
configured interrupt event as specified by the last received control
descriptor for this client. If no control descriptor has been configured
this will default to having sent the End of Frame signal to the
receiving module. This event will cause a one to be set in this
register until cleared by software. Write a 1 to this field to clear the
value.
23 INT_STAT_TRANS1_LU
MA W 0h
The client interface trans1_luma has reached its current configured
interrupt event as specified by the last received control descriptor for
this client. If no control descriptor has been configured this will
default to having sent the End of Frame signal to the receiving
module. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
22 INT_STAT_TRANS1_CH
ROMA W 0h
The client interface trans1_chroma has reached its current
configured interrupt event as specified by the last received control
descriptor for this client. If no control descriptor has been configured
this will default to having sent the End of Frame signal to the
receiving module. This event will cause a one to be set in this
register until cleared by software. Write a 1 to this field to clear the
value.
21 INT_STAT_HDMI_WRBK
_OUT W 0h
The client interface hdmi_wrbk_out has reached its current
configured interrupt event as specified by the last received control
descriptor for this client. If no control descriptor has been configured
this will default to having received the End of Frame signal from the
transmitting module. This event will cause a one to be set in this
register until cleared by software. Write a 1 to this field to clear the
value.
20 INT_STAT_VPI_CTL W 0h
The client interface vpi_ctl has reached its current configured
interrupt event as specified by the last received control descriptor for
this client. If no control descriptor has been configured this will
default to having sent the End of Frame signal to the receiving
module. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
19 INT_STAT_VBI_SDVENC W 0h
The client interface vbi_sdvenc has reached its current configured
interrupt event as specified by the last received control descriptor for
this client. If no control descriptor has been configured this will
default to having sent the End of Frame signal to the receiving
module. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.
18 Reserved R 0h
17 INT_STAT_NF_420_UV_
OUT W 0h
The client interface nf_420_uv_out has reached its current
configured interrupt event as specified by the last received control
descriptor for this client. If no control descriptor has been configured
this will default to having received the End of Frame signal from the
transmitting module. This event will cause a one to be set in this
register until cleared by software. Write a 1 to this field to clear the
value.
16 INT_STAT_NF_420_Y_O
UT W 0h
The client interface nf_420_y_out has reached its current configured
interrupt event as specified by the last received control descriptor for
this client. If no control descriptor has been configured this will
default to having received the End of Frame signal from the
transmitting module. This event will cause a one to be set in this
register until cleared by software. Write a 1 to this field to clear the
value.
15 INT_STAT_NF_420_UV_I
N W 0h
The client interface nf_420_uv_in has reached its current configured
interrupt event as specified by the last received control descriptor for
this client. If no control descriptor has been configured this will
default to having sent the End of Frame signal to the receiving
module. This event will cause a one to be set in this register until
cleared by software. Write a 1 to this field to clear the value.