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Registers
389
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Table 1-178. intc_intr1_status_raw0 Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
13
VPDMA_INT1_LIST6_NO
TIFY_RAW
R/W
0h
VPDMA INT0 List6 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
12
VPDMA_INT1_LIST6_CO
MPLETE_RAW
R/W
0h
VPDMA INT0 List6 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
11
VPDMA_INT1_LIST5_NO
TIFY_RAW
R/W
0h
VPDMA INT0 List5 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
10
VPDMA_INT1_LIST5_CO
MPLETE_RAW
R/W
0h
VPDMA INT0 List5 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
9
VPDMA_INT1_LIST4_NO
TIFY_RAW
R/W
0h
VPDMA INT0 List4 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
8
VPDMA_INT1_LIST4_CO
MPLETE_RAW
R/W
0h
VPDMA INT0 List4 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
7
VPDMA_INT1_LIST3_NO
TIFY_RAW
R/W
0h
VPDMA INT0 List3 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
6
VPDMA_INT1_LIST3_CO
MPLETE_RAW
R/W
0h
VPDMA INT0 List3 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
5
VPDMA_INT1_LIST2_NO
TIFY_RAW
R/W
0h
VPDMA INT0 List2 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
4
VPDMA_INT1_LIST2_CO
MPLETE_RAW
R/W
0h
VPDMA INT0 List2 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
3
VPDMA_INT1_LIST1_NO
TIFY_RAW
R/W
0h
VPDMA INT0 List1 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
2
VPDMA_INT1_LIST1_CO
MPLETE_RAW
R/W
0h
VPDMA INT0 List1 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
1
VPDMA_INT1_LIST0_NO
TIFY_RAW
R/W
0h
VPDMA INT0 List0 Notify Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect
0
VPDMA_INT1_LIST0_CO
MPLETE_RAW
R/W
0h
VPDMA INT0 List0 Complete Status Read indicates raw status 0 =
inactive 1 = active Writing 1 will set status Writing 0 has no effect