9
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
List of Figures
1-293. clkc_rst Register
..........................................................................................................
1-294. clkc_dps Register
.........................................................................................................
1-295. clkc_vip1dps Register
....................................................................................................
1-296. clkc_vip2dps Register
....................................................................................................
1-297. clkc_venc_clksel Register
...............................................................................................
1-298. clkc_venc_ena Register
..................................................................................................
1-299. clkc_range_map Register
................................................................................................
1-300. clkc_underflow Register
..................................................................................................
1-301. VPDMA_pid Register
.....................................................................................................
1-302. VPDMA_list_addr Register
..............................................................................................
1-303. VPDMA_list_attr Register
................................................................................................
1-304. VPDMA_list_stat_sync Register
........................................................................................
1-305. VPDMA_vpi_ctl_address Register
......................................................................................
1-306. VPDMA_vpi_ctl_data Register
..........................................................................................
1-307. VPDMA_bg_rgb Register
................................................................................................
1-308. VPDMA_bg_yuv Register
................................................................................................
1-309. VPDMA_descriptor_top Register
.......................................................................................
1-310. VPDMA_descriptor_bottom Register
...................................................................................
1-311. VPDMA_current_descriptor Register
...................................................................................
1-312. VPDMA_descriptor_status_control Register
..........................................................................
1-313. VPDMA_int0_channel0_int_stat Register
.............................................................................
1-314. VPDMA_int0_channel0_int_mask Register
...........................................................................
1-315. VPDMA_int0_channel1_int_stat Register
.............................................................................
1-316. VPDMA_int0_channel1_int_mask Register
...........................................................................
1-317. VPDMA_int0_channel2_int_stat Register
.............................................................................
1-318. VPDMA_int0_channel2_int_mask Register
...........................................................................
1-319. VPDMA_int0_channel3_int_stat Register
.............................................................................
1-320. VPDMA_int0_channel3_int_mask Register
...........................................................................
1-321. VPDMA_int0_channel4_int_stat Register
.............................................................................
1-322. VPDMA_int0_channel4_int_mask Register
...........................................................................
1-323. VPDMA_int0_channel5_int_stat Register
.............................................................................
1-324. VPDMA_int0_channel5_int_mask Register
...........................................................................
1-325. VPDMA_int0_channel6_int_stat Register
.............................................................................
1-326. VPDMA_int0_channel6_int_mask Register
...........................................................................
1-327. VPDMA_int0_client0_int_stat Register
................................................................................
1-328. VPDMA_int0_client0_int_mask Register
..............................................................................
1-329. VPDMA_int0_client1_int_stat Register
................................................................................
1-330. VPDMA_int0_client1_int_mask Register
..............................................................................
1-331. VPDMA_int0_list0_int_stat Register
...................................................................................
1-332. VPDMA_int0_list0_int_mask Register
.................................................................................
1-333. VPDMA_int1_channel0_int_stat Register
.............................................................................
1-334. VPDMA_int1_channel0_int_mask Register
...........................................................................
1-335. VPDMA_int1_channel1_int_stat Register
.............................................................................
1-336. VPDMA_int1_channel1_int_mask Register
...........................................................................
1-337. VPDMA_int1_channel2_int_stat Register
.............................................................................
1-338. VPDMA_int1_channel2_int_mask Register
...........................................................................
1-339. VPDMA_int1_channel3_int_stat Register
.............................................................................
1-340. VPDMA_int1_channel3_int_mask Register
...........................................................................
1-341. VPDMA_int1_channel4_int_stat Register
.............................................................................