Texas Instruments DM38x DaVinci, User Manual

Page: 327 / 956

www.ti.com
Registers
327 SPRUHI7A – December 2012 – Revised June 2016
Submit Documentation Feedback
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.3.2.2 CIG_reg1 Register (offset = 4h) [reset = 0h]
CIG_reg1 is shown in Figure 1-220 and described in Table 1-127 .
CIG Display Config Reg
Figure 1-220. CIG_reg1 Register
31 30 29 28 27 26 25 24
Reserved DISP_W
R-0h R/W-0h
23 22 21 20 19 18 17 16
DISP_W
R/W-0h
15 14 13 12 11 10 9 8
Reserved DISP_H
R-0h R/W-0h
7 6 5 4 3 2 1 0
DISP_H
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 1-127. CIG_reg1 Register Field Descriptions
Bit Field Type Reset Description
31-27 Reserved R 0h
Reserved
26-16 DISP_W R/W 0h
Output display Width (max = 1920)
15-11 Reserved R 0h
Reserved
10-0 DISP_H R/W 0h
Output display Height (max = 0x7FF)