Internal Modules
211
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
if (tarW>srcW) {
// upscale
mod_srcW
= srcW;
mod_srcWi = srcWi;
} else if (tarW<=(srcW>>2)) {
// downscale by <=1/4
mod_srcW
= srcW>>2;
mod_srcWi = srcWi>>2;
} else if (tarW<=(srcW>>1)) {
// downscale by <=1/2
mod_srcW
= srcW>>1;
mod_srcWi = srcWi>>1;
} else {
// downscale by <=1
mod_srcW
= srcW;
mod_srcWi = srcWi;
}
// Not used any more:
// hs_factor
= int(16.0*double(tarWi)/double(mod0.5);
// hor scale factor (6.4)
// ----------------------------------------------------------------
// Horizontal PolyPhase Settings
--
// ----------------------------------------------------------------
lin_acc_inc
= int(16777216.0*double(mod_srcWi-1)/double(tarWi-1)+0.5);
col_acc_offset
= int(16777216.0*hor_pixel_0.5);
nlin_left
= (tarW-tarWi)>>1;
nlin_right
= nltarWi-1;
if (linear) {
nlin_acc_inc
= 0;
nlin_acc_init
= 0;
} else {
// ----------------------------------
// Non-linear scaling configuration
// ----------------------------------
nlin_left_src
= (mod_srcW-mod_srcWi)>>1;
if (tarWi>=srcWi) {
// upscale
d
=
0.0;
round_factor
=
0.5;
} else {
// downscale
d
= (double(tarW)-1.0)/2.0;
round_factor
= -0.5;
}
K
= 16777216.0*double(nlin_left_src)/(double(nlin_left)*double(nlin_left-
2.0*d));
nlin_acc_inc
= int(2.0*K+round_factor);
nlin_acc_init = int(K*(1.0-2.0*d)+0.5);
}
nlin_left_tar
= nlin_left;
nlin_right_tar = nlin_right;
// ==========================================================================================
// Bypass Determination
// ==========================================================================================
// bypass
if ((srcW==tarW)&&(srcWi==tarWi)&&(mod_srcH==mod_tarH)) sc_bypass = 1;
else
sc_bypass = 0;
//
}