![background image](http://html1.mh-extra.com/html/texas-instruments/dm38x-davinci/dm38x-davinci_user-manual_1097067955.webp)
Registers
955
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.3.14.56 VIP_PARSER_xtra7_port_b Register (offset = DCh) [reset = 0h]
VIP_PARSER_xtra7_port_b is shown in
and described in
Cfg Disable Active Srcnum Vector Input for Port B
Figure 1-618. VIP_PARSER_xtra7_port_b Register
31
30
29
28
27
26
25
24
yuv_srcnum_stop_immediately
R/W-
23
22
21
20
19
18
17
16
yuv_srcnum_stop_immediately
R/W-
15
14
13
12
11
10
9
8
anc_srcnum_stop_immediately
R/W-
7
6
5
4
3
2
1
0
anc_srcnum_stop_immediately
R/W-
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit;
-n
= value after reset
Table 1-536. VIP_PARSER_xtra7_port_b Register Field Descriptions
Bit
Field
Type
Reset
Description
31-16
yuv_srcnum_stop_immedi
ately
R/W
0h
For the Active Video Port to the VPDMA, logic exists to ensure that a
complete frame is sent out to the VPDMA following cfg_enable
transitioning inactive for that port. Each bit in this vector represents a
srcnum (remapped srcnum for TI line mux mode) going to the
VPDMA. For example, bit 0 is srcnum 0, bit 1 is srcnum 1, etc. A 0 in
a bit position means that the hardware will wait for that srcnum, if it
is in the middle of a frame, to continue until the end of the frame
before stopping. A 1 in a bit position means that it is ok for a srcnum
to stop in the middle of a frame. For example, suppose a source is
removed and the input will never complete sending a frame. If the bit
position representing that srcnum is set to 0 , the port will never
disable.
15-0
anc_srcnum_stop_immedi
ately
R/W
0h
For the Ancillary Data Port to the VPDMA, logic exists to ensure that
a complete frame is sent out to the VPDMA following cfg_enable
transitioning inactive for that port. Each bit in this vector represents a
srcnum (remapped srcnum for TI line mux mode) going to the
VPDMA. For example, bit 0 is srcnum 0, bit 1 is srcnum 1, etc. A 0 in
a bit position means that the hardware will wait for that srcnum, if it
is in the middle of a frame, to continue until the end of the frame
before stopping. A 1 in a bit position means that it is ok for a srcnum
to stop in the middle of a frame. For example, suppose a source is
removed and the input will never complete sending a frame. If the bit
position representing that srcnum is set to 0 , the port will never
disable.