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Description of the Subsystem
48
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
Table 1-7. HDVPSS Mux Select Register 4
HDVPSS Mux Select Register
Value Required
vcomp mux select
1
hdcomp mux select
1
sd mux select
2
sc_5 mux select
1
sec0 mux select
0
sec1 mux select
0
csc_vip0 mux select
0
sc_vip0 mux select
4
chr_ds0_vip0 mux select
0
chr_ds1_vip0 mux select
1
vin0_rgb_out_hi_select
0
vin0_rgb_out_lo_select
0
vin0_multi_channel_select
0
csc_vip1 mux select
0
sc_vip1 mux select
4
chr_ds0_vip1 mux select
1
chr_ds1_vip1 mux select
0
vin1_rgb_out_hi_select
0
vin1_rgb_out_lo_select
0
vin1_multi_channel_select
0