Description of the Subsystem
29
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.1
Description of the Subsystem
1.1.1 Overview
The HDVPSS module includes video display and capture processing modules using the latest TI-
developed algorithms, flexible compositing and blending engine, and a full range of external video
interfaces in order to deliver high-quality video content to end devices.
1.1.2 Acronyms and Definitions
Table 1-1. HDVPSS Acronyms
Acronym
Definition
HDVPSS
High Definition Video Processing Subsystem
DEI
De-Interlacer
DVO
Digital Video Output
GRPX
Graphics Pipeline
HDMI
High Definition Multimedia Interface
NF
Noise Filter
NTSC
National Television System Committee
PAL
Phase Alternating Line
SC
Scaler
SD
Standard Definition
SDK
Software Development Kit
COMP
Compositor
VENC
Video Encoder
VIP
Video Input Port
VPDMA
Video Port Direct Memory Access
FID
Field ID (Modules inside HDVPSS interpret FID = 0 as a TOP-field and FID = 1 as a BOTTOM field)
Table 1-2. HDVPSS Data Format
Name
DataFormat A
Arrangement
Tiler Support
422I/422P
YUV422I_YUYV
Single Buffer: Y U Y V Y U Y V
No
420T
YUV420SP_UV
Y Buffer: Y Y Y Y
UV buffer: U V U V
Y: 8-bit container
UV: 16-bit container
422S
YUV422SP_UV
Y Buffer: Y Y Y Y
UV Buffer: U V U V
Y: 8-bit container
UV: 16-bit container
422T
YUV422I_YUYV
Single Buffer: Y U Y V Y U Y V
Yes : 16-bit container
444
YUV444
Single Buffer: Y U V
No
RGB565
RGB565
Single Buffer RGB, 16 bit/pixel
No
RGB24
RGB
Single Buffer RGB, 24 bit/pixel
No
ARGB1555
ARGB1555
Single Buffer: ARGB, 16 bit/pixel
No
ARGB4444
ARGB4444
Single Buffer: ARGB, 16 bit/pixel
No
ARGB24
ARGB24
Single Buffer: ARGB, 24 bit/pixel
No
ARGB32
ARGB32
Single Buffer: ARGB, 32 bit/pixel
No
Bitmap
Bitmap
Single Buffer: Color Lookup Table
(RGB input only)
No
