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Registers
803
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.3.11.9 SC_M_cfg_sc9 Register (offset = 24h) [reset = 0h]
SC_M_cfg_sc9 is shown in
and described in
Figure 1-482. SC_M_cfg_sc9 Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CFG_LIN_ACC_INC
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit;
-n
= value after reset
Table 1-397. SC_M_cfg_sc9 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-0
CFG_LIN_ACC_INC
R/W
0h
This parameter is used by horizontal scaling. It defines the increment
of the linear accumulator.
if ((cfg_dcm_2x==0) && (cfg_dcm_4x==0) ) then lin_acc_inc =
round(2^24*(srcWi) /(tarWi))
if ((cfg_dcm_2x==1) && (cfg_dcm_4x==0) ) then lin_acc_inc =
round(2^24*(srcWi/2) /(tarWi))
if ((cfg_dcm_2x==0) && (cfg_dcm_4x==1) ) then lin_acc_inc =
round(2^24*(srcWi/4) /(tarWi))
where srcWi and tarWi are the inner source width and the inner
target width respectively.