Registers
877
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.3.13.4 VCOMP_reg3 Register (offset = Ch) [reset = 0h]
VCOMP_reg3 is shown in
and described in
Figure 1-553. VCOMP_reg3 Register
31
30
29
28
27
26
25
24
CFG_AUX_ENABLE
CFG_AUX_FIXED_D
ATA_SEND
Reserved
CFG_AUX_NATIVE_NUMLINES
R/W-0h
R/W-0h
R-0h
R/W-0h
23
22
21
20
19
18
17
16
CFG_AUX_NATIVE_NUMLINES
R/W-0h
15
14
13
12
11
10
9
8
Reserved
CFG_AUX_NATIVE_NUMPIX_PER_LINE
R-0h
R/W-0h
7
6
5
4
3
2
1
0
CFG_AUX_NATIVE_NUMPIX_PER_LINE
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit;
-n
= value after reset
Table 1-470. VCOMP_reg3 Register Field Descriptions
Bit
Field
Type
Reset
Description
31
CFG_AUX_ENABLE
R/W
0h
0 = Disable Aux Plane
1 = Enable Aux Plane
30
CFG_AUX_FIXED_DATA
_SEND
R/W
0h
0 = Send out the aux source data
1 = When the aux source is enabled.. send the alternate aux
Y/Cb/Cr values instead of the true source picture. This bit allows the
datapath to flush through without outputing the actual picture. The
aux window would be seen as a constant color.
29-28
Reserved
R
0h
Reserved
27-16
CFG_AUX_NATIVE_NUM
LINES
R/W
0h
Number of lines in a field or frame from the incoming aux source
15-12
Reserved
R
0h
Reserved
11-0
CFG_AUX_NATIVE_NUM
PIX_PER_LINE
R/W
0h
Number of pixels per line from the incoming aux source
