74
SPRUHE8E – October 2012 – Revised November 2019
Copyright © 2012–2019, Texas Instruments Incorporated
List of Tables
18-69. USB Device RESUME Interrupt Status and Clear Register (USBDRISC) Field Descriptions
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18-70. USB General-Purpose Control and Status Register (USBGPCS) Field Descriptions
..........................
18-71. USB VBUS Droop Control Register (USBVDC) Field Descriptions
..............................................
18-72. USB VBUS Droop Control Raw Interrupt Status Register (USBVDCRIS) Field Descriptions
................
18-73. USB VBUS Droop Control Raw Interrupt Status Register (USBVDCIM) Field Descriptions
..................
18-74. USB VBUS Droop Control Raw Interrupt Status Register (USBVDCISC) Field Descriptions
................
18-75. USB ID Valid Detect Raw Interrupt Status Register (USBIDVRIS) Field Descriptions
........................
18-76. USB ID Valid Detect Interrupt Mask Register (USBIDVIM) Field Descriptions
.................................
18-77. USB ID Valid Detect Interrupt Status and Clear Register (USBIDVISC) Field Descriptions
..................
18-78. USB DMA Select Register (USBDMASEL) Field Descriptions
....................................................
19-1.
TX & RX FIFO Organization
...........................................................................................
19-2.
Ethernet Register Map
..................................................................................................
19-3.
Ethernet MAC Raw Interrupt Status/Acknowledge (MACRIS/MACIACK) Register Field Descriptions
......
19-4.
Ethernet MAC Interrupt Mask (MACIM) Register Field Descriptions
.............................................
19-5.
Ethernet MAC Receive Control (MACRCTL) Register Field Descriptions
.......................................
19-6.
Ethernet MAC Transmit Control (MACTCTL) Register Field Descriptions
......................................
19-7.
Ethernet MAC Data (MACDATA) Register (READ) Field Descriptions
..........................................
19-8.
Ethernet MAC Data (MACDATA) Register (WRITE) Field Descriptions
.........................................
19-9.
Ethernet MAC Individual Address 0 (MACIA0) Register Field Descriptions
.....................................
19-10. Ethernet MAC Individual Address 0 (MACIA1) Register Field Descriptions
.....................................
19-11. Ethernet MAC Threshold (MACTHR) Register Field Descriptions
................................................
19-12. Ethernet MAC Management Control (MACMCTL) Register Field Descriptions
.................................
19-13. Ethernet MAC Management Divider (MACMDV) Register Field Descriptions
..................................
19-14. Ethernet MAC Management Address Register (MACMAR) Field Descriptions
.................................
19-15. Ethernet MAC Management Transmit Data (MACMTXD) Register Field Descriptions
........................
19-16. Ethernet MAC Management Receive Data (MACMRXD) Register Field Descriptions
........................
19-17. Ethernet MAC Number of Packets (MACNP) Register Field Descriptions
......................................
19-18. Ethernet MAC Transmission Request (MACTR) Register Field Descriptions
...................................
19-19. Ethernet MAC Timer Support (MACTS) Register Field Descriptions
.............................................
19-20. Ethernet PHY Management Register 0 – Control (MR0) Register Field Descriptions
.........................
19-21. Ethernet PHY Management Register 1 – Control (MR1) Register Field Descriptions
.........................
19-22. Ethernet PHY Management Register 2 – PHY Identifier 1 (MR2) Register Field Descriptions
...............
19-23. Ethernet PHY Management Register 3 – PHY Identifier 2 (MR3) Register Field Descriptions
...............
19-24. Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4) Register Field
Descriptions
..............................................................................................................
19-25. Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability (MR5)
Register Field Descriptions
............................................................................................
19-26. Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6) Register Field Descriptions
20-1.
SSI Base Address Table (CM)
........................................................................................
20-2.
SSI_REGS Registers
...................................................................................................
20-3.
SSI_REGS Access Type Codes
......................................................................................
20-4.
SSICR0 Register Field Descriptions
..................................................................................
20-5.
SSICR1 Register Field Descriptions
..................................................................................
20-6.
SSIDR Register Field Descriptions
...................................................................................
20-7.
SSISR Register Field Descriptions
....................................................................................
20-8.
SSICPSR Register Field Descriptions
................................................................................
20-9.
SSIIM Register Field Descriptions
....................................................................................
20-10. SSIRIS Register Field Descriptions
...................................................................................
20-11. SSIMIS Register Field Descriptions
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