System Control Registers
203
SPRUHE8E – October 2012 – Revised November 2019
Copyright © 2012–2019, Texas Instruments Incorporated
System Control and Interrupts
1.13.5.2 M3NMI Flag (MNMIFLG) Register
Figure 1-62. M3NMI Flag (MNMIFLG) Register
31
16
Reserved
R-0:0
15
10
9
8
Reserved
ACIBERR
C28NMIWDRST
R-0
R-0
R-0
7
6
5
4
3
2
1
0
C28PIENMIERR
EXTGPIO
C28BISTERR
M3BISTERR
Reserved
CLOCKFAIL
NMIINT
R-0
R-0
R/W-1
R/W-1
R-0:0
R-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Table 1-73. M3NMI Flag (MNMIFLG) Register Field Descriptions
Bit
Field
Value
Description
31-10
Reserved
Reserved
9
ACIBERR
CIB Error NMI Flag
This bit indicates if there is a stuck condition on the CIB INTS or CIB READY signals causing an
NMI condition. This bit can only be cleared by the user writing to the corresponding clear bit in the
NMIFLGCLR register or by an XRS reset.
0
No CIB INTS or READY stuck error condition pending
1
CIB INTS or READY stuck error condition generated
8
C28NMIWDRST
C28 NMI WD Reset Flag
This bit indicates that a reset was issued by the C28 NMIWD since the C28 did not service its NMI
interrupt. Once enabled, the flag cannot be cleared by the user. This bit can only be cleared by the
user writing to the corresponding clear bit in the NMIFLGCLR register or by an XRS reset.
0
No C28 NMI WD RST condition pending
1
C28 NMI WD RST condition generated
7
C28PIENMIERR
C28 PIE NMIERR NMI Flag
This bit indicates that an error condition was generated during NMI vector fetch from C28 PIE.
Once enabled, the flag cannot be cleared by the user. This bit can only be cleared by the user
writing to the corresponding clear bit in the NMIFLGCLR register or by an XRS reset.
0
No C28 PIE NMIERR condition pending
1
C28 PIE NMIERR condition generated
6
EXTGPIO
External GPIO NMI Flag
This bit indicates if the external GPIO pin generated an NMI interrupt. The bit can only be cleared
by the user writing to the respective bit in the NMIFLGCLR register or by an XRS reset.
0
No external GPIO NMI pending
1
External GPIO NMI condition pending
5
C28BISTERR
HW BIST Error NMI Flag: This bit indicates if the time out error or a signature mismatch error
condition during hardware BIST of M3 occurred. This bit can only be cleared by the user writing to
the corresponding clear bit in the NMIFLGCLR register or by an XRSn reset.
0
No C28 HWBIST error condition pending
1
C28 BIST error condition generated
4
M3BISTERR
HW BIST Error NMI Flag: This bit indicates if the time out error or a signature mismatch error
condition during hardware BIST of M3 occurred. This bit can only be cleared by the user writing to
the corresponding clear bit in the NMIFLGCLR register or by an XRSn reset.
0
No M3 HWBIST error condition pending
1
M3 BIST error condition generated
1
CLOCKFAIL
Clock Fail NMI Flag
This bit indicates if the CLOCKFAIL condition is latched. These bits can only be cleared by the user
writing to the respective bit in the NMIFLGCLR register or by an XRS reset.
0
No CLOCKFAIL condition pending
1
CLOCKFAIL condition generated