Section 15 External CPU Interface (EXCPU)
Rev. 1.00 Oct. 01, 2007 Page 623 of 1956
REJ09B0256-0100
15.3 Register
Descriptions
Table 15.2 shows the EXCPU register configuration. Table 15.3 shows the register states in each
operating mode.
Table 15.2 Register Configuration
Register Name
Abbrevia-
tion R/W
Area P4
Address
Area 7
Address
Access
Size
External CPU control register
EXCCTRL
R/W
H'FE40 000C
H'1E40 000C
32
External CPU memory space
select register
EXCMSETR R/W
H'FE40 0010
H'1E40 0010
32
External CPU output interrupt
control register
EXCINOR
R/W
H'FE40 0014
H'1E40 0014
32
Table 15.3 Register States in Each Operating Mode
Register Name
Abbrevia-
tion
Power-On
Reset
Manual
Reset Sleep
Standby
External CPU control register
EXCCTRL
H'0000 0000 H'0000 0000 Retained
Retained
External CPU memory space
select register
EXCMSETR H'0000 0000 H'0000 0000 Retained
Retained
External CPU output interrupt
control register
EXCINOR
H'0000 0000 H'0000 0000 Retained
Retained
Summary of Contents for SH7763
Page 2: ...Rev 1 00 Oct 01 2007 Page ii of lxvi ...
Page 122: ...Section 2 Programming Model Rev 1 00 Oct 01 2007 Page 56 of 1956 REJ09B0256 0100 ...
Page 144: ...Section 3 Instruction Set Rev 1 00 Oct 01 2007 Page 78 of 1956 REJ09B0256 0100 ...
Page 170: ...Section 4 Pipelining Rev 1 00 Oct 01 2007 Page 104 of 1956 REJ09B0256 0100 ...
Page 282: ...Section 7 Caches Rev 1 00 Oct 01 2007 Page 216 of 1956 REJ09B0256 0100 ...
Page 378: ...Section 9 Interrupt Controller INTC Rev 1 00 Oct 01 2007 Page 312 of 1956 REJ09B0256 0100 ...
Page 514: ...Section 12 DDR SDRAM Interface DDRIF Rev 1 00 Oct 01 2007 Page 448 of 1956 REJ09B0256 0100 ...
Page 630: ...Section 13 PCI Controller PCIC Rev 1 00 Oct 01 2007 Page 564 of 1956 REJ09B0256 0100 ...
Page 710: ...Section 16 Clock Pulse Generator CPG Rev 1 00 Oct 01 2007 Page 644 of 1956 REJ09B0256 0100 ...
Page 732: ...Section 17 Watchdog Timer and Reset WDT Rev 1 00 Oct 01 2007 Page 666 of 1956 REJ09B0256 0100 ...
Page 752: ...Section 18 Power Down Mode Rev 1 00 Oct 01 2007 Page 686 of 1956 REJ09B0256 0100 ...
Page 772: ...Section 19 Timer Unit TMU Rev 1 00 Oct 01 2007 Page 706 of 1956 REJ09B0256 0100 ...
Page 824: ...Section 21 Compare Match Timer CMT Rev 1 00 Oct 01 2007 Page 758 of 1956 REJ09B0256 0100 ...
Page 1124: ...Section 26 I 2 C Bus Interface IIC Rev 1 00 Oct 01 2007 Page 1058 of 1956 REJ09B0256 0100 ...
Page 1350: ...Section 30 SIM Card Module SIM Rev 1 00 Oct 01 2007 Page 1284 of 1956 REJ09B0256 0100 ...
Page 1484: ...Section 33 Audio Codec Interface HAC Rev 1 00 Oct 01 2007 Page 1418 of 1956 REJ09B0256 0100 ...
Page 1560: ...Section 35 USB Host Controller USBH Rev 1 00 Oct 01 2007 Page 1494 of 1956 REJ09B0256 0100 ...
Page 1720: ...Section 37 LCD Controller LCDC Rev 1 00 Oct 01 2007 Page 1654 of 1956 REJ09B0256 0100 ...
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