NXP Semiconductors LPC43Sxx, Руководство пользователя

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User manual Rev. 2.1 — 10 December 2015 955 of 1441
NXP Semiconductors
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Chapter 30: LPC43xx/LPC43Sxx State Configurable Timer (SCT)
STATE_L R/W 0x044 SCT state register low counter 16-bit 0x0000 0000 Table 724
STATE_H R/W 0x046 SCT state register high counter 16-bit 0x0000 0000 Table 724
INPUT RO 0x048 SCT input register 0x0000 0000 Table 725
REGMODE R/W 0x04C SCT match/capture registers mode register 0x0000 0000 Table 726
REGMODE_L R/W 0x04C SCT match/capture registers mode register low
counter 16-bit 0x0000 0000 Table 726
REGMODE_H R/W 0x04E SCT match/capture registers mode register high
counter 16-bit 0x0000 0000 Table 726
OUTPUT R/W 0x050 SCT output register 0x0000 0000 Table 727
OUTPUTDIRCTRL R/W 0x054 SCT output counter direction control register 0x0000 0000 Table 728
RES R/W 0x058 SCT conflict resolution register 0x0000 0000 Table 729
DMAREQ0 R/W 0x05C SCT DMA request 0 register 0x0000 0000 Table 730
DMAREQ1 R/W 0x060 SCT DMA request 1 register 0x0000 0000 Table 731
- - 0x064 -
0x0EC Reserved - -
EVEN R/W 0x0F0 SCT event enable register 0x0000 0000 Table 732
EVFLAG R/W 0x0F4 SCT event flag register 0x0000 0000 Table 733
CONEN R/W 0x0F8 SCT conflict enable register 0x0000 0000 Table 734
CONFLAG R/W 0x0FC SCT conflict flag register 0x0000 0000 Table 735
MATCH0 to
MATCH15 R/W 0x100 to
0x13C SCT match value register of match channels 0 to
15; REGMOD0 to REGMODE15 = 0 0x0000 0000 Table 735
MATCH0_L to
MATCH15_L R/W 0x100 to
0x13C SCT match value register of match channels 0 to
15; low counter 16-bit; REGMOD0_L to
REGMODE15_L = 0 0x0000 0000 Table 735
MATCH0_H to
MATCH15_H R/W 0x102 to
0x13E SCT match value register of match channels 0 to
15; high counter 16-bit; REGMOD0_H to
REGMODE15_H = 0 0x0000 0000 Table 735
CAP0 to CAP15 0x100 to
0x13C SCT capture register of capture channel 0 to 15;
REGMOD0 to REGMODE15 = 1 0x0000 0000 Table 737
CAP0_L to CAP15_L 0x100 to
0x13C SCT capture register of capture channel 0 to 15;
low counter 16-bit; REGMOD0_L to
REGMODE15_L = 1 0x0000 0000 Table 737
CAP0_H to CAP15_H 0x102 to
0x13E SCT capture register of capture channel 0 to 15;
high counter 16-bit; REGMOD0_H to
REGMODE15_H = 1 0x0000 0000 Table 737
MATCH0_L to
MATCH15_L R/W 0x180 to
0x1A0 MATCH alias register (see Section 30.7.9 ). SCT
match value register of match channels 0 to 15;
low counter 16-bit; REGMOD0_L to
REGMODE15_L = 0
0x0000 0000 Table 735
MATCH0_H to
MATCH15_H R/W 0x1C0 to
0x1E0 MATCH alias register (see Section 30.7.9 ). SCT
match value register of match channels 0 to 15;
high counter 16-bit; REGMOD0_H to
REGMODE15_H = 0
0x0000 0000 Table 735
Table 716. Register overview: State Configurable Timer (base address 0x4000 0000)
…continued
Name Access Address
offset
Description Reset value Reference