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UM10503
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© NXP B.V. 2015. All rights reserved.
User manual
Rev. 2.1 — 10 December 2015
600 of 1441
NXP Semiconductors
UM10503
Chapter 23: LPC43xx/LPC43Sxx External Memory Controller (EMC)
DYNAMICCONFIG2
R/W
0x140
Selects the configuration information for
dynamic memory chip select 2.
0
0
DYNAMICRASCAS2
R/W
0x144
Selects the RAS and CAS latencies for
dynamic memory chip select 2.
0x303
0x303
-
-
0x148 -
0x15C
Reserved.
-
-
-
DYNAMICCONFIG3
R/W
0x160
Selects the configuration information for
dynamic memory chip select 3.
0
0
DYNAMICRASCAS3
R/W
0x164
Selects the RAS and CAS latencies for
dynamic memory chip select 3.
0x303
0x303
-
-
0x168 -
0x1FC
Reserved.
-
-
-
STATICCONFIG0
R/W
0x200
Selects the memory configuration for
static chip select 0.
0
0x81
STATICWAITWEN0
R/W
0x204
Selects the delay from chip select 0 to
write enable.
0
0
STATICWAITOEN0
R/W
0x208
Selects the delay from chip select 0 or
address change, whichever is later, to
output enable.
0
0
STATICWAITRD0
R/W
0x20C
Selects the delay from chip select 0 to a
read access.
0x1F
STATICWAITPAGE0
R/W
0x210
Selects the delay for asynchronous page
mode sequential accesses for chip
select 0.
0x1F
0x1F
STATICWAITWR0
R/W
0x214
Selects the delay from chip select 0 to a
write access.
0x1F
0x1F
STATICWAITTURN0
R/W
0x218
Selects the number of bus turnaround
cycles for chip select 0.
0xF
0xF
-
-
0x21C
Reserved.
-
-
-
STATICCONFIG1
R/W
0x220
Selects the memory configuration for
static chip select 1.
0
0
STATICWAITWEN1
R/W
0x224
Selects the delay from chip select 1 to
write enable.
0
0
STATICWAITOEN1
R/W
0x228
Selects the delay from chip select 1 or
address change, whichever is later, to
output enable.
0
0
STATICWAITRD1
R/W
0x22C
Selects the delay from chip select 1 to a
read access.
0x1F
0x1F
STATICWAITPAGE1
R/W
0x230
Selects the delay for asynchronous page
mode sequential accesses for chip
select 1.
0x1F
0x1F
STATICWAITWR1
R/W
0x234
Selects the delay from chip select 1 to a
write access.
0x1F
0x1F
Table 414. Register overview: External memory controller (base address 0x4000 5000)
…continued
Name
Access Address
offset
Description
Reset
value
Reset
value
after
EMC
boot
Reference