NXP Semiconductors LPC43Sxx, Руководство пользователя

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UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2015. All rights reserved.
User manual Rev. 2.1 — 10 December 2015 345 of 1441
NXP Semiconductors
UM10503
Chapter 16: LPC43xx/LPC43Sxx Pin configuration
Clock pins
CLK0 N5 K3
[4]
O;
PU O EMC_CLK0 — SDRAM clock 0.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
I/O SD_CLK — SD/MMC card clock.
O EMC_CLK01 — SDRAM clock 0 and clock 1 combined.
I/O SSP1_SCK — Serial clock for SSP1.
I ENET_TX_CLK (ENET_REF_CLK) — Ethernet Transmit Clock (MII
interface) or Ethernet Reference Clock (RMII interface).
CLK1 T10 -
[4]
O;
PU O EMC_CLK1 — SDRAM clock 1.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT0 — CGU spare clock output 0.
- R — Function reserved.
O I2S1_TX_MCLK — I2S1 transmit master clock.
CLK2 D14 K6
[4]
O;
PU O EMC_CLK3 — SDRAM clock 3.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
I/O SD_CLK — SD/MMC card clock.
O EMC_CLK23 — SDRAM clock 2 and clock 3 combined.
O I2S0_TX_MCLK — I2S transmit master clock.
I/O I2S1_RX_SCK — Receive Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the I
2
S-bus specification.
CLK3 P12 -
[4]
O;
PU O EMC_CLK2 — SDRAM clock 2.
O CLKOUT — Clock output pin.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
O CGU_OUT1 — CGU spare clock output 1.
- R — Function reserved.
I/O I2S1_RX_SCK — Receive Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the I
2
S-bus specification.
Debug pins
DBGEN L4 A6
[2]
I I JTAG interface control signal. Also used for boundary scan.
Table 186. LPC4370/LPC43S70 Pin description
…continued
LCD is not available on all parts.
Symbol
LB
GA25
6
TFBGA100 R
e
se
t st
ate
[1
]
Ty
p
e
Description