NXP Semiconductors SAFE ASSURE Qorivva MPC5601P, Reference Manual

Page: 442 / 954

Chapter 20 Deserial Serial Peripheral Interface (DSPI)
MPC5602P Microcontroller Reference Manual, Rev. 4
442 Freescale Semiconductor
20.6.2.7 Serial Clock (SCK_ x )
SCK_ x is a serial communication clock signal. In master mode, the DSPI generates the SCK. In slave
mode, SCK_ x is an input from an external bus master.
20.7 Memory map and registers description
20.7.1 Memory map
Table 20-2 shows the DSPI memory map.
Table 20-2. DSPI memory map
Offset from
DSPI_BASE
0xFFF9_0000 (DSPI_0)
0xFFF9_4000 (DSPI_1)
0xFFF9_8000 (DSPI_2) Register Location
0x0000 DSPI_MCR — DSPI module configuration register on page 443
0x0004 Reserved
0x0008 DSPI_TCR — DSPI transfer count register on page 446
0x000C DSPI_CTAR0 — DSPI clock and transfer attributes register
0
on page 447
0x0010 DSPI_CTAR1 — DSPI clock and transfer attributes register
1
on page 447
0x0014 DSPI_CTAR2 — DSPI clock and transfer attributes register
2
on page 447
0x0018 DSPI_CTAR3 — DSPI clock and transfer attributes register
3
on page 447
0x001C DSPI_CTAR4 — DSPI clock and transfer attributes register
4
on page 447
0x0020 DSPI_CTAR5 — DSPI clock and transfer attributes register
5
on page 447
0x0024 DSPI_CTAR6 — DSPI clock and transfer attributes register
6
on page 447
0x0028 DSPI_CTAR7 — DSPI clock and transfer attributes register
7
on page 447
0x002C DSPI_SR—DSPI status register on page 453
0x0030 DSPI_RSER — DSPI DMA/interrupt request select and
enable register
on page 455
0x0034 DSPI_PUSHR — DSPI push TX FIFO register on page 456
0x0038 DSPI_POPR — DSPI pop RX FIFO register on page 458
0x003C DSPI_TXFR0 — DSPI transmit FIFO register 0 on page 459
0x0040 DSPI_TXFR1 — DSPI transmit FIFO register 1 on page 459