Chapter 20 Deserial Serial Peripheral Interface (DSPI)
MPC5602P Microcontroller Reference Manual, Rev. 4
458
Freescale Semiconductor
20.7.2.7
DSPI POP RX FIFO Register (DSPI
x
_POPR)
The DSPI
x
_POPR allows you to read the RX FIFO. Refer to
Section 20.8.3.5, “Receive First In First Out
for a description of the RX FIFO operations. Eight or 16-bit read
accesses to the DSPI
x
_POPR fetch the RX FIFO data, and update the counter and pointer.
NOTE
Reading the RX FIFO field fetches data from the RX FIFO. Once the RX
FIFO is read, the read data pointer is moved to the next entry in the RX
FIFO. Therefore, read DSPI
x
_POPR only when you need the data. For
compatibility, configure the TLB (MMU table) entry for DSPI
x
_POPR as
guarded.
5
CTCNT
Clear SPI_TCNT
Provides a means for host software to clear the SPI transfer counter. The CTCNT bit clears the
SPI_TCNT field in the DSPI
x
_TCR. The SPI_TCNT field is cleared before transmission of the
current SPI frame begins.
0 Do not clear SPI_TCNT field in the DSPI
x
_TCR.
1 Clear SPI_TCNT field in the DSPI
x
_TCR.
Note:
Use in SPI master mode only.
6–7
Reserved
10–15
PCS
x
Peripheral chip select
x
Selects which CS
x
signals are asserted for the transfer.
0 Negate the CS
x
signal.
1 Assert the CS
x
signal.
Note:
Use in SPI master mode only.
16–31
TXDATA
[0:15]
Transmit data
Holds SPI data for transfer according to the associated SPI command.
Note:
Use TXDATA in master and slave modes.
Address: Base + 0x0038
Access: User read-only
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
RXDATA
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 20-9. DSPI POP RX FIFO Register (DSPI
x
_POPR)
Table 20-14. DSPI
x
_PUSHR field descriptions (continued)
Field
Description
