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Chapter 25 FlexPWM
MPC5602P Microcontroller Reference Manual, Rev. 4
Freescale Semiconductor
691
FORCE_OUT signal is provided mainly for commutated applications. When PWM signals are
commutated on an inverter controlling a brushless DC motor, it is necessary to restart the PWM cycle at
the beginning of the commutation interval. This action effectively resynchronizes the PWM waveform to
the commutation timing. Otherwise, the average voltage applied to a motor winding integrated over the
entire commutation interval will be a function of the timing between the asynchronous commutation event
with respect to the PWM cycle. The effect is more critical at higher motor speeds where each commutation
interval may consist of only a few PWM cycles. If the counter is not initialized at the start of each
commutation interval, the result will be an oscillation caused by the beating between the PWM frequency
and the commutation frequency.
25.8.4
PWM generation
illustrates how PWM generation is accomplished in each submodule. In each case, two
comparators and associated VALx registers are utilized for each PWM output signal. One comparator and
VAL
x
register control the turn-on edge, while a second comparator and VAL
y
register control the turn-off
edge.
Figure 25-40. PWM generation hardware
16-bit
comparator
16-bit
comparator
16-bit
comparator
16-bit
comparator
D
R
Q
PWMA_INIT
PWM on
PWM off
16-bit
comparator
16-bit
comparator
D
S
R
Q
PWMB_INIT
PWM on
PWM off
VAL0
VAL1
VAL2
VAL3
VAL4
VAL5
Output Triggers
Compare Interrupts
16-bit counter
R
Q
SYNC_INIT
PWM on
PWM off
D
S
S
Half Comp
Mod Comp
(inverted
PWMA
PWMB
PWMX
FORCE_OUT
FORCE_EN
Force Init
to Force Out
logic
Local Sync)