Renesas H8S Family, Hardware Manual

Page: 254 / 1230

Section 8 I/O Ports
Rev. 1.00 Mar. 12, 2008 Page 206 of 1178
REJ09B0403-0100
8.1.4 Port 4
Port 4 is an 8-bit I/O port. Port 4 pins can also function as the external interrupt input, de-bounced
input, bidirectional data bus, address bus, and address-data multiplex bus pins. Port 4 has the
following registers.
•
Port 4 data direction register (P4DDR)
•
Port 4 data register (P4DR)
•
Port 4 pull-up MOS control register (P4PCR)
•
Noise canceler enable register (P4BNCE)
•
Noise canceler mode control register (P4BNCMC)
•
Noise cancel cycle setting register (NCCS)
(1)
Port 4 Data Direction Register (P4DDR)
The individual bits of P4DDR specify input or output for the port 4 pins. P4DDR is initialized
only by a system reset, and retains the value even if an internal reset signal of the WDT is
generated.
Bit Bit Name Initial Value R/W Description
7 P47DDR 0 W
6 P46DDR 0 W
5 P45DDR 0 W
4 P44DDR 0 W
•
Normal extended mode (ADMXE = 0)
When set to 1, the corresponding pins function as
address output pins; when cleared to 0, function as
input port pins.
The address output pins used are in accord with the
settings of the IOSE and CS256E bits of SYSCR.
•
Address-data multiplex extended mode (ADMXE =
1)
These bits correspond to the AD15 to AD12 pins of
the address-data multiplex bus.
•
Single-chip mode
When set to 1, the corresponding pins function as
output port pins; when cleared to 0, function as input
port pins.