Renesas H8S Family, Hardware Manual

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Section 19 LPC Interface (LPC)
Rev. 1.00 Mar. 12, 2008 Page 718 of 1178
REJ09B0403-0100
19.3.25 BT Status Register 0 (BTSR0)
BTSR0 is one of the registers used to implement BT mode. This register includes flags that control
interrupts to the slave (this LSI).
R/W
Bit Bit Name Initial Value Slave Host Description
7 to 5

All 0 R/W

Reserved
The initial value should not be changed.
4 FRDI 0 R/(W)
*

FIFO Read Request Interrupt
This status flag indicates that host writes the data to
BTDTR buffer with FIFO full state at the host write
transfer. When the IBFIE3 bit and FRDIE bit are set
to 1, IBFI3 interrupt is requested to the slave. The
slave must clear the flag after creating an unused
area by reading the data in FIFO.
0: FIFO read is not requested
[Clearing condition]
After the slave reads FRDI = 1, writes 0 to this bit.
1: FIFO read is requested
[Setting condition]
After the host processor transfers data, the host
writes the data with FIFO Full state.
3 HRDI 0 R/(W)
*

BT Host Read Interrupt
This status flag indicates that the host reads 1 byte
from BTDTR buffer. When the IBFIE3 bit and HRDIE
bit are set to 1, IBFI3 interrupt is requested to the
slave.
0: Host BTDTR read wait state
[Clearing condition]
After the slave reads HRDI = 1, writes 0 to this bit.
1: The host reads from BTDTR
[Setting condition]
The host reads one byte from BTDTR.