Section 8 I/O Ports
Rev. 1.00 Mar. 12, 2008 Page 192 of 1178
REJ09B0403-0100
8.1.1 Port
1
Port 1 is an 8-bit I/O port. Port 1 pins can also function as the address bus and address-data
multiplex bus pins. The pin functions change according to the operating mode. Port 1 has the
following registers.
•
Port 1 data direction register (P1DDR)
•
Port 1 data register (P1DR)
•
Port 1 pull-up MOS control register (P1PCR)
(1)
Port 1 Data Direction Register (P1DDR)
The individual bits of P1DDR specify input or output for the pins of port 1.
Bit
Bit Name
Initial Value
R/W Description
7 P17DDR
0
W
6 P16DDR
0
W
5 P15DDR
0
W
4 P14DDR
0
W
3 P13DDR
0
W
2 P12DDR
0
W
1 P11DDR
0
W
0 P10DDR
0
W
•
Normal extended mode (ADMXE = 0)
When set to 1, the corresponding pins function as
address output pins; when cleared to 0, function
as input port pins.
•
Address-data multiplex extended mode (ADMXE =
1)
These bits correspond to the AD7 to AD0 pins of
the address-data multiplex bus.
•
Single-chip mode
When set to 1, the corresponding pins function as
output port pins; when cleared to 0, function as
input port pins.
Summary of Contents for H8S Family
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Page 70: ...Section 1 Overview Rev 1 00 Mar 12 2008 Page 22 of 1178 REJ09B0403 0100...
Page 108: ...Section 2 CPU Rev 1 00 Mar 12 2008 Page 60 of 1178 REJ09B0403 0100...
Page 116: ...Section 3 MCU Operating Modes Rev 1 00 Mar 12 2008 Page 68 of 1178 REJ09B0403 0100...
Page 152: ...Section 5 Interrupt Controller Rev 1 00 Mar 12 2008 Page 104 of 1178 REJ09B0403 0100...
Page 206: ...Section 6 Bus Controller BSC Rev 1 00 Mar 12 2008 Page 158 of 1178 REJ09B0403 0100...
Page 420: ...Section 9 14 Bit PWM Timer PWMX Rev 1 00 Mar 12 2008 Page 372 of 1178 REJ09B0403 0100...
Page 476: ...Section 12 Watchdog Timer WDT Rev 1 00 Mar 12 2008 Page 428 of 1178 REJ09B0403 0100...
Page 552: ...Section 14 CRC Operation Circuit CRC Rev 1 00 Mar 12 2008 Page 504 of 1178 REJ09B0403 0100...
Page 712: ...Section 18 I2 C Bus Interface IIC Rev 1 00 Mar 12 2008 Page 664 of 1178 REJ09B0403 0100...
Page 804: ...Section 19 LPC Interface LPC Rev 1 00 Mar 12 2008 Page 756 of 1178 REJ09B0403 0100...
Page 838: ...Section 20 Ethernet Controller EtherC Rev 1 00 Mar 12 2008 Page 790 of 1178 REJ09B0403 0100...
Page 964: ...Section 24 RAM Rev 1 00 Mar 12 2008 Page 916 of 1178 REJ09B0403 0100...
Page 1066: ...Section 25 Flash Memory Rev 1 00 Mar 12 2008 Page 1018 of 1178 REJ09B0403 0100...
Page 1098: ...Section 26 Boundary Scan JTAG Rev 1 00 Mar 12 2008 Page 1050 of 1178 REJ09B0403 0100...
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