Renesas H8S Family, Hardware Manual

Page: 702 / 1230

Section 18 I
2
C Bus Interface (IIC)
Rev. 1.00 Mar. 12, 2008 Page 654 of 1178
REJ09B0403-0100
Table 18.13 I
2
C Bus Timing (with Maximum Influence of t
Sr
/t
Sf
)
Time Indication (at Maximum Transfer Rate) [ns]
Item
t
cyc
Indication
t
Sr
/t
Sf
Influence
(Max.)
I
2
C Bus
Specifi-
cation (Min.)
φ
= 20 MHz
φ
= 25 MHz
φ
= 34 MHz
 
Standard mode
  φ
/200
φ
/224
φ
/224
 
High-speed mode
  φ
/48
φ
/56
φ
/80
t
SCLHO
Standard mode –1000 4000 4000 3480 3706 0.5 t
SCLO
(–t
Sr
)
High-speed mode –300 600 900 820 876
t
SCLLO
Standard mode –250 4700 4750 4230 4456 0.5 t
SCLO
(–t
Sf
)
High-speed mode –250 1300 950* 870* 926*
t
BUFO
Standard mode –1000 4700 3950* 3440* 3676* 0.5 t
SCLO
–1 t
cyc
( –t
Sr
)
High-speed mode –300 1300 850* 780* 847*
t
STAHO
Standard mode –250 4000 4700 4190 4426 0.5 t
SCLO
–1 t
cyc
(–t
Sf
)
High-speed mode –250 600 900 830 897
t
STASO
Standard mode –1000 4700 9000 7960 8412 1 t
SCLO
(–t
Sr
)
High-speed mode –300 600 2100 1940 2053
t
STOSO
Standard mode –1000 4000 4100 3560 3765 0.5 t
SCLO
+ 2 t
cyc
(–t
Sr
)
High-speed mode –300 600 1000 900 935
Standard mode –1000 250 3600 3110 3368 t
SDASO
(master)
1 t
SCLLO
*
3
–3 t
cyc
(–t
Sr
)
High-speed mode –300 100 500 450 538
Standard mode –1000 250 3100 3220 3347 t
SDASO
(slave)
1 t
SCLL
*
3
–12
t
cyc
*
2
(–t
Sr
)
High-speed mode –300 100 400 520 64
t
SDAHO
3 t
cyc
Standard mode 0 0 150 120 88
High-speed mode 0 0 150 120 88
Notes: 1. Does not meet the I
2
C bus interface specification. Remedial action such as the following
is necessary: (a) secure a start/stop condition issuance interval; (b) adjust the rise and
fall times by means of a pull-up resistor and capacitive load; (c) reduce the transfer rate;
(d) select slave devices whose input timing permits this output timing.
The values in the above table will vary depending on the settings of the bits TCSS,
IICX3 to IICX0 and CKS2 to CKS0. Depending on the frequency it may not be possible
to achieve the maximum transfer rate; therefore, whether or not the I
2
C bus interface
specifications are met must be determined in accordance with the actual setting
conditions.