Renesas H8S Family, Hardware Manual

Page: 1101 / 1230

Section 27 Clock Pulse Generator
Rev. 1.00 Mar. 12, 2008 Page 1053 of 1178
REJ09B0403-0100
Table 27.2 Crystal Resonator Parameters
Frequency (MHz) 5 8 8.5
R
S
(max) (
Ω
) 100 80 70
C
0
(max) (pF) 7 7 7
27.1.2 External Clock Input Method
Figure 27.4 shows a typical method of connecting an external clock signal. To leave the XTAL
pin open, incidental capacitance should be 10 pF or less.
To input an inverted clock to the XTAL pin, the external clock should be tied to high in standby
mode.
EXTAL
XTAL
External clock input
Open
(a) Example of external clock input when XTAL pin left open
EXTAL
XTAL
External clock input
(b) Example of external clock input when an inverted clock is input to XTAL pin
Figure 27.4 Example of External Clock Input
When a specified clock signal is input to the EXTAL pin, internal clock signal output is
determined after the external clock output stabilization delay time (t
DEXT
) has passed. As the clock
signal output is not determined during the t
DEXT
cycle, a reset signal should be set to low to hold it
in reset state. For the external clock output stabilization delay time, refer to section 31, Electrical
Characteristics.