Renesas H8S Family, Hardware Manual

Page: 326 / 1230

Section 8 I/O Ports
Rev. 1.00 Mar. 12, 2008 Page 278 of 1178
REJ09B0403-0100
8.2.2 Port 2
Port 2 is an 8-bit I/O port. Port 2 pins can also function as the SCIF modem control signal, address
bus, and address-data multiplex bus pins. The pin functions change according to the operating
mode. Port 2 has the following registers.
•
Port 2 data direction register (P2DDR)
•
Port 2 data register (P2DR)
•
Port 2 pull-up MOS control register (P2PCR)
(1)
Port 2 Data Direction Register (P2DDR)
The individual bits of P2DDR specify input or output for the pins of port 2.
Bit Bit Name Initial Value R/W Description
7 P27DDR 0 W
6 P26DDR 0 W
5 P25DDR 0 W
4 P24DDR 0 W
When set to 1, the corresponding pins function as
output port pins; when cleared to 0, function as
input port pins.
3 P23DDR 0 W
2 P22DDR 0 W
1 P21DDR 0 W
0 P20DDR 0 W
•
Normal extended mode (ADMXE = 0)
When set to 1, the corresponding pins function
as address output pins; when cleared to 0,
function as input port pins.
The address output pins used are in accord
with the settings of the IOSE and CS256E bits
of SYSCR.
•
Address-data multiplex extended mode
(ADMXE = 1)
These bits correspond to the AD11 to AD8 pins
of the address-data multiplex bus.
•
Single-chip mode
When set to 1, the corresponding pins function
as output port pins; when cleared to 0, function
as input port pins.