Renesas H8S Family, Hardware Manual

Page: 860 / 1230

Section 21 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 1.00 Mar. 12, 2008 Page 812 of 1178
REJ09B0403-0100
21.2.13 Receiving-Buffer Write Address Register (RBWAR)
RBWAR stores the address of data to be written in the receiving buffer when the E-DMAC writes
data to the receiving buffer. Which addresses in the receiving buffer are processed by the E-
DMAC can be recognized by monitoring addresses displayed in this register. The address that the
E-DMAC is actually processing may be different from the value read from this register.
Bit Bit Name
Initial
value
R/W Description
31 to 0 RBWA31 to
RBWA0 All 0 R Receiving-Buffer Write Address
These bits can only be read. Writing is prohibited.
21.2.14 Receiving-Descriptor Fetch Address Register (RDFAR)
RDFAR stores the descriptor start address that is required when the E-DMAC fetches descriptor
information from the receiving descriptor. Which receiving descriptor information is used for
processing by the E-DMAC can be recognized by monitoring addresses displayed in this register.
The address from which the E-DMAC is actually fetching a descriptor may be different from the
value read from this register.
Bit Bit Name
Initial
value
R/W Description
31 to 0 RDFA31 to
RDFA0 All 0 R Receiving-Descriptor Fetch Address
These bits can only be read. Writing is prohibited.
21.2.15 Transmission-Buffer Read Address Register (TBRAR)
TBRAR stores the address of the transmission buffer when the E-DMAC reads data from the
transmission buffer. Which addresses in the transmission buffer are processed by the E-DMAC
can be recognized by monitoring addresses displayed in this register. The address from which the
E-DMAC is actually reading in the buffer may be different from the value read from this register.
Bit Bit Name
Initial
value
R/W Description
31 to 0 TBRA31 to
TBRA0 All 0 R Transmission-Buffer Read Address
These bits can only be read. Writing is prohibited.