Section 23
A/D Converter
Rev. 1.00 Mar. 12, 2008 Page 913 of 1178
REJ09B0403-0100
23.7.6
Notes on Noise Countermeasures
In order to prevent damage due to an abnormal voltage such as an excessive surge at the analog
input pins (AN0 to AN7), a protection circuit should be connected between AVcc and AVss as
shown in figure 23.9. Also, the bypass capacitors connected to AVcc and the filter capacitors
connected to AN0 to AN7 must be connected to AVss.
When a filter capacitor is connected, the input currents at the analog input pins (AN0 to AN7) are
averaged which may cause an error. Also, when A/D conversion is performed frequently, as in
scan mode, if the current charged and discharged by the capacitance of the sample-and-hold circuit
in the A/D converter exceeds the current input via the input impedance (R
in
), an error will arise in
the analog input pin voltage. Therefore, careful consideration is required upon deciding the circuit
constants.
AVcc
*
1
AN0 to AN7
AVss
Notes: Values are reference values.
*
1
*
2
R
in
: Input impedance
*
1
R
in
*
2
100
Ω
0.1 µF
0.01 µF
10 µF
AVref
Figure 23.9 Example of Analog Input Protection Circuit
Table 23.6 Standard of Analog Pins
Item Min. Max. Unit
Analog input
capacitance
20 pF
Acceptable signal
source impedance
5 k
Ω
Summary of Contents for H8S Family
Page 2: ...Rev 1 00 Mar 12 2008 Page ii of xIviii...
Page 8: ...Rev 1 00 Mar 12 2008 Page viii of xIviii...
Page 28: ...Rev 1 00 Mar 12 2008 Page xxviii of xIviii...
Page 48: ...Rev 1 00 Mar 12 2008 Page xlviii of xIviii...
Page 70: ...Section 1 Overview Rev 1 00 Mar 12 2008 Page 22 of 1178 REJ09B0403 0100...
Page 108: ...Section 2 CPU Rev 1 00 Mar 12 2008 Page 60 of 1178 REJ09B0403 0100...
Page 116: ...Section 3 MCU Operating Modes Rev 1 00 Mar 12 2008 Page 68 of 1178 REJ09B0403 0100...
Page 152: ...Section 5 Interrupt Controller Rev 1 00 Mar 12 2008 Page 104 of 1178 REJ09B0403 0100...
Page 206: ...Section 6 Bus Controller BSC Rev 1 00 Mar 12 2008 Page 158 of 1178 REJ09B0403 0100...
Page 420: ...Section 9 14 Bit PWM Timer PWMX Rev 1 00 Mar 12 2008 Page 372 of 1178 REJ09B0403 0100...
Page 476: ...Section 12 Watchdog Timer WDT Rev 1 00 Mar 12 2008 Page 428 of 1178 REJ09B0403 0100...
Page 552: ...Section 14 CRC Operation Circuit CRC Rev 1 00 Mar 12 2008 Page 504 of 1178 REJ09B0403 0100...
Page 712: ...Section 18 I2 C Bus Interface IIC Rev 1 00 Mar 12 2008 Page 664 of 1178 REJ09B0403 0100...
Page 804: ...Section 19 LPC Interface LPC Rev 1 00 Mar 12 2008 Page 756 of 1178 REJ09B0403 0100...
Page 838: ...Section 20 Ethernet Controller EtherC Rev 1 00 Mar 12 2008 Page 790 of 1178 REJ09B0403 0100...
Page 964: ...Section 24 RAM Rev 1 00 Mar 12 2008 Page 916 of 1178 REJ09B0403 0100...
Page 1066: ...Section 25 Flash Memory Rev 1 00 Mar 12 2008 Page 1018 of 1178 REJ09B0403 0100...
Page 1098: ...Section 26 Boundary Scan JTAG Rev 1 00 Mar 12 2008 Page 1050 of 1178 REJ09B0403 0100...
Page 1226: ...Rev 1 00 Mar 12 2008 Page 1178 of 1178 REJ09B0403 0100...
Page 1229: ......
Page 1230: ...H8S 2472 Group H8S 2462 Group Hardware Manual...