Renesas H8S Family, Hardware Manual

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Section 2 CPU
Rev. 1.00 Mar. 12, 2008 Page 32 of 1178
REJ09B0403-0100
2.4.1 General Registers
The H8S/2600 CPU has eight 32-bit general registers. These general registers are all functionally
identical and can be used as both address registers and data registers. When a general register is
used as a data register, it can be accessed as a 32-bit, 16-bit, or 8-bit register. Figure 2.7 illustrates
the usage of the general registers. When the general registers are used as 32-bit registers or address
registers, they are designated by the letters ER (ER0 to ER7).
The ER registers divide into 16-bit general registers designated by the letters E (E0 to E7) and R
(R0 to R7). These registers are functionally equivalent, providing a maximum of sixteen 16-bit
registers. The E registers (E0 to E7) are also referred to as extended registers.
The R registers divide into 8-bit general registers designated by the letters RH (R0H to R7H) and
RL (R0L to R7L). These registers are functionally equivalent, providing a maximum of sixteen 8-
bit registers.
The usage of each register can be selected independently.
General register ER7 has the function of stack pointer (SP) in addition to its general-register
function, and is used implicitly in exception handling and subroutine calls. Figure 2.8 shows the
stack.
• Address registers
• 32-bit registers • 16-bit registers • 8-bit registers
ER registers
(ER0 to ER7)
E registers (extended registers)
(E0 to E7)
R registers
(R0 to R7)
RH registers
(R0H to R7H)
RL registers
(R0L to R7L)
Figure 2.7 Usage of General Registers