Channel Priority
919
SPRUH22I – April 2012 – Revised November 2019
Copyright © 2012–2019, Texas Instruments Incorporated
C28 Direct Memory Access (DMA) Module
CH1
→
CH2
→
CH3
→
CH4
→
CH5
→
CH6
→
CH1
→
CH2
→
…
In the case above, after each channel has transferred a burst of words, the next channel is serviced. You
can specify the size of the burst for each channel. Once CH6 (or the last enabled channel) has been
serviced, and no other channels are pending, the round-robin state machine enters an idle state.
From the idle state, channel 1 (if enabled) is always serviced first. However, if the DMA is currently
processing another channel x, all other pending channels between x and the end of the round are serviced
before CH1. It is in this sense that all the channels are of
equal
priority. For instance, take an example
where CH1, CH4, and CH5 are enabled in round-robin mode and CH4 is currently being processed. Then
CH1 and CH5 both receive an interrupt trigger from their respective peripherals before CH4 completes.
CH1 and CH5 are now both pending. When CH4 completes its burst, CH5 will be serviced next. Only after
CH5 completes will CH1 be serviced. Upon completion of CH1, if there are no more channels pending, the
round-robin state machine will enter an idle state.
A more complicated example is shown below:
•
Assume all channels are enabled, and the DMA is in an idle state,
•
Initially a trigger occurs on CH1, CH3, and CH5 on the same cycle,
•
When the CH1 burst transfer starts, requests from CH3 and CH5 are pending,
•
Before completion of the CH1 burst, the DMA receives a request from CH2. Now the pending requests
are from CH2, CH3, and CH5,
•
After completing the CH1 burst, CH2 will be serviced since it is next in the round-robin scheme after
CH1.
•
After the burst from CH2 is finished, the CH3 burst will be serviced, followed by CH5 burst.
•
Now while the CH5 burst is being serviced, the DMA receives a request from CH1, CH3, and CH6.
•
The burst from CH6 will start after the completion of the CH5 burst since it is the next channel after
CH5 in the round-robin scheme.
•
This will be followed by the CH1 burst and then the CH3 burst
•
After the CH3 burst finishes, assuming no more triggers have occurred, the round-robin state machine
will enter an idle state.
The round-robin state machine may be reset to the idle state via the DMACTRL[PRIORITYRESET] bit.
11.5.2 Channel 1 High Priority Mode
In this mode, if a CH1 trigger occurs, the current word transfer or the c 1 word transfer (depends
on which phase of the current DMA transfer the new CH1 trigger occurred) on any other channel is
completed (not the complete burst), execution is halted, and CH1 is serviced for the complete burst count.
When the CH1 burst is complete, execution returns to the channel that was active when the CH1 trigger
occurred. All other channels have equal priority and each enabled channel is serviced in round-robin
fashion as follows:
Higher Priority:
CH1
Lower priority:
CH2
→
CH3
→
CH4
→
CH5
→
CH6
→
CH2
→
…
Given an example where CH1, CH4 and CH5 are enabled in Channel 1 High Priority Mode and CH4 is
currently being processed. Then CH1 and CH5 both receive an interrupt trigger from their respective
peripherals before CH4 completes. CH1 and CH5 are now both pending. When the current CH4 word
transfer is completed, regardless of whether the DMA has completed the entire CH4 burst, CH4 execution
will be suspended and CH1 will be serviced. After the CH1 burst completes, CH4 will resume execution.
Upon completion of CH4, CH5 will be serviced. After CH5 completes, if there are no more channels
pending, the round-robin state machine will enter an idle state.
Typically Channel 1 would be used in this mode for the ADC, since its data rate is so high. However,
Channel 1 High Priority Mode may be used in conjunction with any peripheral.
