Texas Instruments Concerto F28M35 Series, Technical Reference Manual

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System Control Registers
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230 SPRUH22I – April 2012 – Revised November 2019
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System Control and Interrupts
1.13.7.16 Run Mode Clock Gating Control Register 1 (RCGC1)
Figure 1-108. Run Mode Clock Gating Control Register 1 (RCGC1)
31 30 29 24
Reserved EPI Reserved
R-0 R/W-0 R-0
23 20 19 18 17 16
Reserved TIMER3 TIMER2 TIMER1 TIMER0
R-0 R/W-0 R/W-0 R/W-0 R/W-0
15 14 13 12 11 8
Reserved I2C1 Reserved I2C0 Reserved
R-0 R/W-0 R-0 R/W-0 R-0
7 6 5 4 3 2 1 0
SSI3 SSI2 SSI1 SSI0 UART3 UART2 UART1 UART0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 1-119. Run Mode Clock Gating Control Register 1 (RCGC1) Field Descriptions
Bit Field Value Description
31 Reserved Reserved
30 EPI EPI Clock Gating Control in Run Mode
This bit controls the clock gating for the EPI module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.
29-20 Reserved Reserved
19 TIMER3 GPT3 Clock Gating Control in Run Mode
This bit controls the clock gating for the TIMER3 module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.
18 TIMER2 GPT2 Clock Gating Control in Run Mode
This bit controls the clock gating for the TIMER2 module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.
17 TIMER1 GPT1 Clock Gating Control in Run Mode
This bit controls the clock gating for the TIMER1 module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.
16 TIMER0 GPT0 Clock Gating Control in Run Mode
This bit controls the clock gating for the TIMER0 module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.
15 Reserved Reserved
14 I2C1 I2C1 Clock Gating Control in Run Mode
This bit controls the clock gating for the I2C1 module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.
13 Reserved Reserved
12 I2C0 I2C0 Clock Gating Control in Run Mode
This bit controls the clock gating for the I2C0 module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.
11-8 Reserved Reserved
7 SSI3 SSI3 Clock Gating Control in Run Mode
This bit controls the clock gating for the SSI3 module. If set, the module receives a clock and
functions. Otherwise, it is unclocked and disabled. If the module is unclocked, reads or writes to the
module generates bus faults.